2009 33rd Annual IEEE International Computer Software and Applications Conference (2009)
Seattle, Washington, USA
July 20, 2009 to July 24, 2009
We present a pipelined wavefront parallelization approach for stencil-based computations. Within a fixed spatial domain successive wavefronts are executed by threads scheduled to a multicore processor chip with a shared outer level cache. By re-using data from cache in the successive wavefronts this multicore-aware parallelization strategy employs temporal blocking in a simple and efficient way. We use the Jacobi algorithm in three dimensions as a prototype or stencil-based computations and prove the efficiency of our approach on the latest generations of Intel's x86 quad- and hexa-core processors.
temporal blocking, wavefront parallelization, stencil computations, multicore
G. Hager, G. Wellein, M. Wittmann, T. Zeiser and H. Fehske, "Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization," 2009 33rd Annual IEEE International Computer Software and Applications Conference(COMPSAC), Seattle, Washington, USA, 2009, pp. 579-586.