The Community for Technology Leaders
Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (2002)
Estes Park, CO, USA
May 8, 2002 to May 8, 2002
ISBN: 1-58113-542-4
TABLE OF CONTENTS

Codesign-extended applications (Abstract)

B. Grattan , Dept. of Electr. Eng., California Univ., Riverside, CA, USA
pp. 1-6

Algorithmic transformation techniques for efficient exploration of alternative application instances (Abstract)

T. Stefanov , Inst. of Adv. Comput. Sci., Leiden Univ., Netherlands
B. Kienhuis , Inst. of Adv. Comput. Sci., Leiden Univ., Netherlands
E. Deprettere , Inst. of Adv. Comput. Sci., Leiden Univ., Netherlands
pp. 7-12

The design context of concurrent computation systems (Abstract)

J.M. Paul , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
C.M. Eatedali , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
D.E. Thomas , Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 19-24

A language for multiple models of computation (Abstract)

D. Bjorklund , Turku Centre for Comput. Sci., Finland
J. Lilius , Turku Centre for Comput. Sci., Finland
pp. 25-30

Symbolic model checking of dual transition Petri Nets (Abstract)

M. Varea , Dept. of Electron. & Comput. Sci., Southampton Univ., UK
B.M. Al-Hashimi , Dept. of Electron. & Comput. Sci., Southampton Univ., UK
pp. 43-48

Simulation Bridge: a framework for multi-processor simulation (Abstract)

G.D. Nagendra , Software Dev. Syst., Texas Instruments India Ltd, Bangalore, India
V.G.P. Kumar , Software Dev. Syst., Texas Instruments India Ltd, Bangalore, India
B.S. Sheshadri , Software Dev. Syst., Texas Instruments India Ltd, Bangalore, India
pp. 49-54

Metrics for design space exploration of heterogeneous multiprocessor embedded systems (Abstract)

D. Sciuto , Politecnico di Milano, Italy
F. Salice , Politecnico di Milano, Italy
L. Pomante , Politecnico di Milano, Italy
W. Fornaciari , Politecnico di Milano, Italy
pp. 55-60

Fast processor core selection for WLAN modem using mappability estimation (Abstract)

J.-P. Soininen , VTT Electron., Oulu, Finland
J. Kreku , VTT Electron., Oulu, Finland
Yang Qu , VTT Electron., Oulu, Finland
M. Forsell , VTT Electron., Oulu, Finland
pp. 61-66

Multi-objective design space exploration using genetic algorithms (Abstract)

M. Palesi , Dip. Ing. Informatica e delle Telecomunicazioni, Catania Univ., Italy
pp. 67-72

Scratchpad memory: a design alternative for cache on-chip memory in embedded systems (Abstract)

R. Banakar , Indian Inst. of Technol., Delhi, India
S. Steinke , Indian Inst. of Technol., Delhi, India
Bo-Sik Lee , Indian Inst. of Technol., Delhi, India
M. Balakrishnan , Indian Inst. of Technol., Delhi, India
P. Marwedel , Indian Inst. of Technol., Delhi, India
pp. 73-78

Hardware support for real-time embedded multiprocessor system-on-a-chip memory management (Abstract)

M. Shalan , Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
V.J. Mooney , Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
pp. 79-84

Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems (Abstract)

A. Azzedine , Univ. de Bretagne, France
J.-P. Diguet , Univ. de Bretagne, France
J.-L. Pillippe , Univ. de Bretagne, France
pp. 85-90

Program slicing for codesign (Abstract)

J.T. Russell , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 91-96

Compiler-directed customization of ASIP cores (Abstract)

T.V.K. Gupta , Maryland Univ., College Park, MD, USA
pp. 97-102

A study of CodePack: optimizing embedded code space (Abstract)

A. Orpaz , EE-Syst., Tel Aviv Univ., Israel
S. Weiss , EE-Syst., Tel Aviv Univ., Israel
pp. 103-108

A novel codesign approach based on distributed virtual machines (Abstract)

C. Kreiner , Inst. for Tech. Informatics, Graz Univ. of Technol., Austria
C. Steger , Inst. for Tech. Informatics, Graz Univ. of Technol., Austria
E. Teiniker , Inst. for Tech. Informatics, Graz Univ. of Technol., Austria
R. Weiss , Inst. for Tech. Informatics, Graz Univ. of Technol., Austria
pp. 109-114

Transformation of SDL specifications for system-level timing analysis (Abstract)

M. Jersak , Inst. of Comput. Eng., Technische Univ. Braunschweig, Germany
K. Richter , Inst. of Comput. Eng., Technische Univ. Braunschweig, Germany
R. Henia , Inst. of Comput. Eng., Technische Univ. Braunschweig, Germany
R. Ernst , Inst. of Comput. Eng., Technische Univ. Braunschweig, Germany
pp. 121-126

Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints (PDF)

Hyunok Oh , Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea
Soonhoi Ha , Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea
pp. 133-138

Design of multi-tasking coprocessor control for Eclipse (Abstract)

M.J. Rutten , Philips Res. Labs., Eindhoven, Netherlands
J.T.J. van Eijndhoven , Philips Res. Labs., Eindhoven, Netherlands
pp. 139-144

Hardware-software bipartitioning for dynamically reconfigurable systems (Abstract)

D.N. Rakhmatov , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
S.B.K. Vrudhula , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
pp. 145-150

Energy savings through compression in embedded Java environments (Abstract)

G. Chen , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
M. Kandemir , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
N. Vijaykrishnan , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
M.J. Irwin , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
pp. 163-168

Communication speed selection for embedded systems with networked voltage-scalable processors (PDF)

Jinfeng Liu , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
P.H. Chou , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
N. Bagherzadeh , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 169-174

Pruning-based energy-optimal device scheduling for hard real-time systems (Abstract)

V. Swaminathan , Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
K. Chakrabarty , Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
pp. 175-180

Energy frugal tags in reprogrammable I-caches for application-specific embedded processors (Abstract)

P. Petrov , CSE Dept., Univ. of California at San Diego, CA, USA
A. Orailoglu , CSE Dept., Univ. of California at San Diego, CA, USA
pp. 181-186

Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems (Abstract)

T. Pop , Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
P. Eles , Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
Zebo Peng , Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
pp. 187-192

Locality-conscious process scheduling in embedded systems (Abstract)

I. Kadayif , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
M. Kandemir , Microsystems Design Lab, Pennsylvania State Univ., University Park, PA, USA
pp. 193-198

Extended quasi-static scheduling for formal synthesis and code generation of embedded software (PDF)

Feng-Shi Su , Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Taiwan
Pao-Ann Hsiung , Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Taiwan
pp. 211-216

Authors index (PDF)

pp. 217
91 ms
(Ver 3.3 (11022016))