The Community for Technology Leaders
Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO) (2006)
New York, New York
Mar. 26, 2006 to Mar. 29, 2006
ISBN: 0-7695-2499-0
TABLE OF CONTENTS
Introduction

Reviewers (PDF)

pp. xiv
Cover
Introduction

Committees (PDF)

pp. xii

Reviewers (PDF)

pp. xiv
Workshops
Tutorials
Session 1: Dynamic Optimization

A Cross-Architectural Interface for Code Cache Manipulation (Abstract)

Kim Hazelwood , University of Virginia
Robert Cohn , Intel Corporation
pp. 17-27

Thread-Shared Software Code Caches (Abstract)

Sanjeev Banerji , Determina, Inc.
Derek Bruening , Determina, Inc.
Vladimir Kiriansky , Determina, Inc.
Timothy Garnett , Determina, Inc.
pp. 28-38

A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework (Abstract)

Brad Calder , University of California, San Diego
Weifeng Zhang , University of California, San Diego
Dean M. Tullsen , University of California, San Diego
pp. 50-64
Session 2: Object-Oriented Code Generation and Optimization

Java JNI Bridge: A Framework for Mixed Native ISA Execution (Abstract)

Qi Zhang , Intel Corporation
Shalom Goldenberg , Intel Corporation
Eric Lin , Intel Corporation
Miaobo Chen , Intel Corporation
Valery Ushakov , Intel Corporation
Yoav Zach , Intel Corporation
Young Wang , Intel Corporation
Suresh Srinivas , Intel Corporation
pp. 65-75

Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing (Abstract)

Koen De Bosschere , Ghent University, Gent, Belgium
Lieven Eeckhout , Ghent University, Gent, Belgium
Kris Venstermans , Ghent University, Gent, Belgium
pp. 76-86

Dynamic Class Hierarchy Mutation (Abstract)

Lixin Su , University of Wisconsin-Madison
Mikko H. Lipasti , University of Wisconsin-Madison
pp. 98-110
Session 3: Phase Detection and Profiling

Online Phase Detection Algorithms (Abstract)

Chandra Krintz , University of California, Santa Barbara
Peter F. Sweeney , IBM T.J. Watson Research Center
Michael Hind , IBM T.J. Watson Research Center
Priya Nagpurkar , University of California, Santa Barbara
V.T. Rajan , IBM T.J. Watson Research Center
pp. 111-123

Region Monitoring for Local Phase Detection in Dynamic Optimization Systems (Abstract)

Wei-Chung Hsu , University of Minnesota
Jiwei Lu , University of Minnesota
Abhinav Das , University of Minnesota
pp. 124-134

Selecting Software Phase Markers with Code Structure Analysis (Abstract)

Brad Calder , University of California, San Diego
Jeremy Lau , University of California, San Diego
Erez Perelman , University of California, San Diego
pp. 135-146

Profiling over Adaptive Ranges (Abstract)

Banit Agrawal , University of California, Santa Barbara
Timothy Sherwood , University of California, Santa Barbara
Shashidhar Mysore , University of California, Santa Barbara
Subhash Suri , University of California, Santa Barbara
Nisheeth Shrivastava , University of California, Santa Barbara
pp. 147-158

2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set (Abstract)

Hyesoon Kim , University of Texas at Austin
M. Aater Suleman , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
Onur Mutlu , University of Texas at Austin
pp. 159-172
Session 4: Tiled and Multicore Compilation

Constructing Virtual Architectures on a Tiled Processor (Abstract)

David Wentzlaff , Massachusetts Institute of Technology
Anant Agarwal , Massachusetts Institute of Technology
pp. 173-184

Compiling for EDGE Architectures (Abstract)

Bill Yoder , University of Texas at Austin
Aaron Smith , University of Texas at Austin
Jon Gibson , University of Texas at Austin
Nick Nethercote , University of Texas at Austin
Kathryn S. McKinle , University of Texas at Austin
Doug Burger , University of Texas at Austin
Jim Burrill , University of Massachusetts
Bertrand Maher , University of Texas at Austin
pp. 185-195

Data and Computation Transformations for Brook Streaming Applications on Multiprocessors (Abstract)

Guei-Yuan Lueh , Intel Corporation
Gansha Wu , Intel Corporation
Zhaohui Du , Intel Corporation
Shih-wei Liao , Intel Corporation
pp. 196-207

Compiler-directed Data Partitioning for Multicluster Processors (Abstract)

Scott A. Mahlke , University of Michigan
Michael L. Chu , University of Michigan
pp. 208-220
Session 5: Static Code Generation and Optimization Issues DSA

Inline Analysis: Beyond Selection Heuristics (Abstract)

Shin-Ming Liu , Hewlett-Packard Company
Dhruva R. Chakrabarti , Hewlett-Packard Company
pp. 221-232

Practical Structure Layout Optimization and Advice (Abstract)

Dhruva Chakrabarti , Hewlett-Packard Company
Sandya Mannarswamy , Hewlett-Packard Company
Robert Hundt , Hewlett-Packard Company
pp. 233-244

Post Register Allocation Spill Code Optimization (Abstract)

Christopher Lupo , University of California, Davis, CA
Kent D. Wilken , University of California, Davis, CA
pp. 245-255

A Compiler-Guided Approach for Reducing Disk Power Consumption by Exploiting Disk Access Locality (Abstract)

Seung Woo Son , Pennsylvania State University
Mahmut Kandemir , Pennsylvania State University
Guangyu Chen , Pennsylvania State University
pp. 256-268
Session 6: SIMD Compilation

Optimizing Dynamic Binary Translation for SIMD Instructions (Abstract)

Qi Zhang , Intel China Software Center
Jianhui Li , Intel China Software Center
Bo Huang , Intel China Software Center
Shu Xu , Intel China Software Center
pp. 269-280

Multi-platform Auto-vectorization (Abstract)

Dorit Nuzman , University Campus, Carmel Mountains
pp. 281-294
Session 7: Optimization Space Exploration

Using Machine Learning to Focus Iterative Optimization (Abstract)

M. Toussaint , University of Edinburgh, UK
G. Fursin , University of Edinburgh, UK
E. Bonilla , University of Edinburgh, UK
J. Thomson , University of Edinburgh, UK
M.F.P. O?Boyle , University of Edinburgh, UK
J. Cavazos , University of Edinburgh, UK
B. Franke , University of Edinburgh, UK
F. Agakov , University of Edinburgh, UK
C.K.I. Williams , University of Edinburgh, UK
pp. 295-305

Exhaustive Optimization Phase Order Space Exploration (Abstract)

Prasad A. Kulkarni , Florida State University
David B. Whalley , Florida State University
Gary S. Tyson , Florida State University
Jack W. Davidson , University of Virginia
pp. 306-318
Session 8: Security and Reliability

Software-Based Transparent and Comprehensive Control-Flow Error Detection (Abstract)

Cheng Wang , PSL-Intel Corporation - USA
Youfeng Wu , PSL-Intel Corporation - USA
Edson Borin , PSL-Intel Corporation - USA
Guido Araujo , IC-UNICAMP - Brazil
pp. 333-345

Compiler Optimizations to Reduce Security Overhead (Abstract)

Tao Zhang , Georgia Institute of Technology
Santosh Pande , Georgia Institute of Technology
Xiaotong Zhuang , Georgia Institute of Technology
pp. 346-357

BIRD: Binary Interpretation using Runtime Disassembly (Abstract)

Tzi-cker Chiueh , SUNY at Stony Brook
Susanta Nanda , SUNY at Stony Brook
Lap-Chung Lam , SUNY at Stony Brook
Wei Li , SUNY at Stony Brook
pp. 358-370
Author Index

Author Index (PDF)

pp. 371
98 ms
(Ver )