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2016 International Conference on Big Data and Smart Computing (BigComp) (2016)
Hong Kong, China
Jan. 18, 2016 to Jan. 20, 2016
ISSN: 2375-9356
ISBN: 978-1-4673-8795-8
pp: 183-190
Mostofa Kamal Rasel , Department of Computer Engineering, Kyung Hee University, Korea, Republic of
Young-Koo Lee , Department of Computer Engineering, Kyung Hee University, Korea, Republic of
ABSTRACT
Presence of triangles in massive graphs provides many important indications to different graph algorithms. In-memory algorithms don't work for massive graphs since these graphs cannot fit into the memory. Recently, external memory-based algorithms have been proposed for efficient triangle listing which focused on I/O efficiency to improve the performance of triangle listing. However, the existing studies still suffer from tremendous calculations result from involving lot of I/Os and joining operations between adjacency lists. This paper focuses on the efficient technique for joining adjacency lists to output triangles by exploiting the CPU parallelism. We first present the new notions of summarized bit batch vector to represent the adjacency lists of massive graphs. We then propose a parallel triangle listing algorithm that asynchronously access the indexed summarized data and join them in groups. We experimentally show that our proposed technique outperforms the existing solutions significantly.
INDEX TERMS
Parallel processing, Central Processing Unit, Indexes, Computers, Elbow, Algorithm design and analysis, Electronic mail
CITATION

M. K. Rasel and Y. Lee, "Exploiting CPU parallelism for triangle listing using hybrid summarized bit batch vector," 2016 International Conference on Big Data and Smart Computing (BigComp)(BIGCOMP), Hong Kong, China, 2016, pp. 183-190.
doi:10.1109/BIGCOMP.2016.7425819
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