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2012 IEEE 21st Asian Test Symposium (2012)
Niigata, Japan Japan
Nov. 19, 2012 to Nov. 22, 2012
ISSN: 1081-7735
ISBN: 978-1-4673-4555-2
pp: 7-12
ABSTRACT
In this paper we present a methodology to accurately diagnose cell internal defects when test patterns with multiple capture cycles are used. The multi-cycle test patterns can lead to more possible excitation conditions such that the existing extraction methods become less accurate. In addition, the realistic cell internal defects may produce different faulty values at different capture cycles, or only produce faulty values on some particular capture cycles. Thus the traditional logic diagnosis techniques may not accurately find the defective cells since most of them use stuck-at fault model to identify defect locations [1]. In the proposed methodology, we enhanced an excitation condition extraction procedure by back tracing from the observation points with fault effects during fault simulation to find the most possible input conditions that cause the fault effects. Additionally, a new method is proposed to locate defective cell locations without using stuck-at fault model. Experimental results on industrial designs proved the effectiveness of the proposed methodology.
INDEX TERMS
Circuit faults, Logic gates, Accuracy, Libraries, Fault diagnosis, Flip-flops, Integrated circuit modeling, excitation condition, fault diagnosis, cell internal defects, cell internal diagnosis
CITATION

X. Fan, M. Sharma, W. Cheng and S. M. Reddy, "Diagnosis of Cell Internal Defects with Multi-cycle Test Patterns," 2012 IEEE 21st Asian Test Symposium(ATS), Niigata, Japan Japan, 2012, pp. 7-12.
doi:10.1109/ATS.2012.62
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