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2012 IEEE 21st Asian Test Symposium (2005)
Calcutta, India
Dec. 18, 2005 to Dec. 21, 2005
ISSN: 1081-7735
ISBN: 0-7695-2481-8
pp: 471
T.M. Mak , Intel Corporation
Beyond the traditional stuck-at fault model, there are transition fault model and path delay model, followed by many, many other fault models that have appeared over the years. Transition model essentially define a node that is slow to rise or slow to fall and that this slow transition make its way to a primary output. Meanwhile path delay fault is more precise and define that a slow event be propagated along specific paths to a particular primary output. Due to their name (transition/delay) and nature, these fault models would appear to detect structural delay faults (whether it is process induced or delay defect induced). There is a general belief in the industry that achieving good coverage with these models would guarantee high product quality.
T.M. Mak, "Limitation of structural scan delay test", 2012 IEEE 21st Asian Test Symposium, vol. 00, no. , pp. 471, 2005, doi:10.1109/ATS.2005.74
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