11th IEEE International Symposium on Asynchronous Circuits and Systems (2005)
New York City, New York, USA
Mar. 14, 2005 to Mar. 16, 2005
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASYNC.2005.15
Y. W. Li , Columbia University
K. L. Shepard , Columbia University
Y. P. Tsividis , Columbia University
In this paper, we discuss how asynchronous design techniques can be used in the implementation of continuous-time signal processors. Such processors are presented by signals developed by continuous-time analog-to-digital converters which involve no sampling, and thus do not exhibit aliasing; in addition, the resulting in-band quantization error is lower than in conventional techniques. Several design considerations are given, and preliminary experimental results are presented.
Y. W. Li, Y. P. Tsividis and K. L. Shepard, "Continuous-Time Digital Signal Processors," 11th IEEE International Symposium on Asynchronous Circuits and Systems(ASYNC), New York City, New York, USA, 2005, pp. 138-143.