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2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST) (2016)
Yilan, Taiwan
Dec. 19, 2016 to Dec. 20, 2016
ISBN: 978-1-5090-5702-3
pp: 1-6
Kohei Matsuda , Kobe University, Japan
Noriyuki Miura , Kobe University, Japan
Makoto Nagata , Kobe University, Japan
Yu-ichi Hayashi , Tohoku-Gakuin University, Japan
Tatsuya Fujii , The University of Electro-Communications, Japan
Kazuo Sakiyama , The University of Electro-Communications, Japan
ABSTRACT
This paper presents a reactive sensor-based IC countermeasure against a laser-fault injection attack on a cryptographic processor. IC substrate potential bounce due to laser injection is in-situ monitored by distributed 1bit compact comparators to raise the alarm against the attack. Since the laser power to induce fault is very high, the associated substrate bounce is large and wide-spread over a broad chip area. The efficient attack detection is thus possible with small hardware overhead. To further squeeze the overhead, an optimal sensor design methodology is proposed. An in-situ precise measurement of the bounce by utilizing an on-chip monitor successfully pre-characterizes the magnitude of the critical substrate bounce causing fault injection. The sensor sensitivity, position, and pitch could be optimized accordingly. A test chip is designed and fabricated in 0.18µm CMOS to evaluate the efficiency and validity of the proposed countermeasure.
INDEX TERMS
Circuit faults, Cryptography, Substrates, Integrated circuit modeling, Semiconductor lasers, Monitoring, Laser theory
CITATION

K. Matsuda, N. Miura, M. Nagata, Y. Hayashi, T. Fujii and K. Sakiyama, "On-chip substrate-bounce monitoring for laser-fault countermeasure," 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST)(ASIANHOST), Yilan, Taiwan, 2016, pp. 1-6.
doi:10.1109/AsianHOST.2016.7835565
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