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2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP) (2017)
Seattle, WA, USA
July 10, 2017 to July 12, 2017
ISSN: 2160-052X
ISBN: 978-1-5090-4826-7
pp: 164-169
Rishan Senanayake , Paraqum Technologies, Dehiwala, Sri Lanka
Namitha Liyanage , Paraqum Technologies, Dehiwala, Sri Lanka
Sasindu Wijeratne , Paraqum Technologies, Dehiwala, Sri Lanka
Sachille Atapattu , Paraqum Technologies, Dehiwala, Sri Lanka
Kasun Athukorala , Paraqum Technologies, Dehiwala, Sri Lanka
P.M.K. Tharaka , Paraqum Technologies, Dehiwala, Sri Lanka
Geethan Karunaratne , Paraqum Technologies, Dehiwala, Sri Lanka
R.M.A.U. Senarath , Paraqum Technologies, Dehiwala, Sri Lanka
Ishantha Perera , Paraqum Technologies, Dehiwala, Sri Lanka
Ashen Ekanayake , Paraqum Technologies, Dehiwala, Sri Lanka
Ajith Pasqual , University of Moratuwa, Sri Lanka
ABSTRACT
Screen content coding (SCC) extension to High Efficiency Video Coding (HEVC) offers substantial compression efficiency over the existing HEVC standard for computer generated content. However, this gain in compression efficiency is achieved at the expense of further computational complexity with several resource hungry coding tools. Hence, extension of SCC to HEVC hardware encoders can be challenging. This paper presents resource efficient hardware designs for two key SCC tools, Intra Block Copy and Palette Coding. Moreover, a new hash search approach is proposed for Intra Block Copy, while a hardware friendly palette indices coding scheme is suggested for Palette Coding. These designs are targeted to achieve the throughput necessary for an 1080p 30 frames/s encoder, and incurs coding loss of 11.4% and 5.1% respectively in all intra configurations. The designs are synthesized for a Virtex-7 VC707 evaluation platform.
INDEX TERMS
Encoding, Hardware, Throughput, Tools, Video coding, Estimation, Random access memory
CITATION

R. Senanayake et al., "High performance hardware architectures for Intra Block Copy and Palette Coding for HEVC screen content coding extension," 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Seattle, WA, USA, 2017, pp. 164-169.
doi:10.1109/ASAP.2017.7995274
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