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2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP) (2016)
London, United Kingdom
July 6, 2016 to July 8, 2016
ISSN: 2160-052X
ISBN: 978-1-5090-1504-7
TABLE OF CONTENTS

Title page (PDF)

pp. c1

Copyright page (PDF)

pp. ii

Message from the ASAP 2016 chairs (PDF)

David Thomas , Imperial College London, UK
Suhaib Fahmy , University of Warwick, UK
pp. iii-iv

Compressed L1 data cache and L2 cache in GPGPUs (Abstract)

Ehsan Atoofian , Electrical Engineering Department, Lakehead University, Thunder Bay, Canada
pp. 1-8

Adaptive ILP control to increase fault tolerance for VLIW processors (Abstract)

Anderson L. Sartor , Institute of Informatics, Federal University of Rio Grande do Sul (UFRGS), Brazil
Stephan Wong , Computer Engineering Laboratory, Faculty of EEMCS, Delft University of Technology (TU Delft), The Netherlands
Antonio C. S. Beck , Institute of Informatics, Federal University of Rio Grande do Sul (UFRGS), Brazil
pp. 9-16

Supervised and unsupervised machine learning for side-channel based Trojan detection (Abstract)

Dirmanto Jap , School of Physical and Mathematical Sciences, Nanyang Technological University, Singapore
Wei He , Temasek Laboratories, Nanyang Technological University, Singapore
Shivam Bhasin , Temasek Laboratories, Nanyang Technological University, Singapore
pp. 17-24

A grain in the silicon: SCA-protected AES in less than 30 slices (Abstract)

Pascal Sasdrich , Horst Görtz Institute for IT-Security, Ruhr-Universität Bochum, Germany
Tim Guneysu , University of Bremen & DFKI, Germany
pp. 25-32

OpenCL-based erasure coding on heterogeneous architectures (Abstract)

Guoyang Chen , North Carolina State University, Raleigh, USA
Huiyang Zhou , North Carolina State University, Raleigh, USA
Xipeng Shen , North Carolina State University, Raleigh, USA
Josh Gahm , Cisco Systems, RTP, NC, USA
Narayan Venkat , Cisco Systems, RTP, NC, USA
Skip Booth , Cisco Systems, RTP, NC, USA
John Marshall , Cisco Systems, RTP, NC, USA
pp. 33-40

Unleashing the performance potential of CPU-GPU platforms for the 3D atmospheric Euler solver (Abstract)

Haohuan Fu , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Jingheng Xu , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Lin Gan , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Chao Yang , Institute of Software, and State Key Laboratory of Computer Science, Chinese Academy of Sciences, China
Wei Xue , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Wenlai Zhao , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Wen Shi , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Xinliang Wang , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Guangwen Yang , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
pp. 41-49

HW/SW-database-codesign for compressed bitmap index processing (Abstract)

Sebastian Haas , Vodafone Chair Mobile Communications Systems, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Tomas Karnagel , Database Technology Group, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Oliver Arnold , Vodafone Chair Mobile Communications Systems, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Erik Laux , Vodafone Chair Mobile Communications Systems, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Benjamin Schlegel , Database Technology Group, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Gerhard Fettweis , Vodafone Chair Mobile Communications Systems, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
Wolfgang Lehner , Database Technology Group, Center for Advancing Electronics Dresden (cfaed), Technische Universität, Germany
pp. 50-57

Modulo scheduling of symbolically tiled loops for tightly coupled processor arrays (Abstract)

Michael Witterauf , Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Alexandru Tanase , Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Frank Hannig , Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Jurgen Teich , Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
pp. 58-66

Efficient pointer management of stack data for software managed multicores (Abstract)

Jian Cai , Compiler Microarchitecture Laboratory, Arizona State University, Tempe, 85287 USA
Aviral Shrivastava , Compiler Microarchitecture Laboratory, Arizona State University, Tempe, 85287 USA
pp. 67-74

A unified software approach to specify pipeline and spatial parallelism in FPGA hardware (Abstract)

Jongsok Choi , ECE Department, University of Toronto, ON, Canada
Ruo Long Lian , ECE Department, University of Toronto, ON, Canada
Stephen Brown , ECE Department, University of Toronto, ON, Canada
Jason Anderson , ECE Department, University of Toronto, ON, Canada
pp. 75-82

A multi-beam Scan Mode Synthetic Aperture Radar processor suitable for satellite operation (Abstract)

Mohammad Reza Mohammadnia , School of Engineering Science, Simon Fraser University, Burnaby, British Columbia, Canada
Lesley Shannon , School of Engineering Science, Simon Fraser University, Burnaby, British Columbia, Canada
pp. 83-90

Synthesisable recursion for C++ HLS tools (Abstract)

David B. Thomas , Dept. of Electrical Engineering, Imperial College London, UK
pp. 91-98

A Domain Specific Language for accelerated Multilevel Monte Carlo simulations (Abstract)

Ben Lindsey , Imperial College London, UK
Matthew Leslie , Bank of America Merrill Lynch, USA
Wayne Luk , Imperial College London, UK
pp. 99-106

F-CNN: An FPGA-based framework for training Convolutional Neural Networks (Abstract)

Wenlai Zhao , Department of Computer Science and Technology, Tsinghua University, China
Haohuan Fu , Department of Computer Science and Technology, Tsinghua University, China
Wayne Luk , Department of Computing, Imperial College London, UK
Teng Yu , Department of Computing, Imperial College London, UK
Shaojun Wang , Department of Automatic Test and Control, Harbin Institute of Technology, China
Bo Feng , Department of Computer Science and Technology, Tsinghua University, China
Yuchun Ma , Department of Computer Science and Technology, Tsinghua University, China
Guangwen Yang , Department of Computer Science and Technology, Tsinghua University, China
pp. 107-114

Guarding the guards: Enhancing LNS performance for common applications (Abstract)

Mark Arnold , XLNS Research, Laramie, WY USA
Ed Chester , Catena Space, Godalming, U.K.
John Cowles , University of Wyoming, Laramie, USA
pp. 123-130

New non-uniform segmentation technique for software function evaluation (Abstract)

Justine Bonnot , UEB, INSA, IETR, UMR 6164, Rennes, France
Erwan Nogues , UEB, INSA, IETR, UMR 6164, Rennes, France
Daniel Menard , UEB, INSA, IETR, UMR 6164, Rennes, France
pp. 131-138

Parallel floating-point expansions for extended-precision GPU computations (Abstract)

Sylvain Collange , INRIA Rennes, France
Mioara Joldes , LAAS CNRS, Toulouse, France
Jean-Michel Muller , CNRS, ENS Lyon, France
Valentina Popescu , ENS Lyon, France
pp. 139-146

Temporal frequent value locality (Abstract)

Lois Orosa , Institute of Computing, University of Campinas (UNICAMP), Brazil
Rodolfo Azevedo , Institute of Computing, University of Campinas (UNICAMP), Brazil
pp. 147-152

A MPSoC cache design space exploration approach based on ABC algorithm to optimize energy consumption and performance (Abstract)

Marcus V. D. dos Santos , Informatics Center - CIN, Federal Univ. of Pernambuco, Recife, Brazil
Edna Barros , Informatics Center - CIN, Federal Univ. of Pernambuco, Recife, Brazil
Andre Aziz , Federal Rural Univ. of Pernambuco, Recife, Brazil
pp. 153-158

gemV: A validated toolset for the early exploration of system reliability (Abstract)

Karthik Tanikella , School of Computing, Informatics and Decision Systems Engineering, Arizona State University, US
Yohan Koy , Department of Computer Science, Yonsei University, Seoul, Korea
Reiley Jeyapaul , ARM Research, Cambridge, UK
Kyoungwoo Lee , Department of Computer Science, Yonsei University, Seoul, Korea
Aviral Shrivastava , School of Computing, Informatics and Decision Systems Engineering, Arizona State University, US
pp. 159-163

On-chip networks for mixed-criticality systems (Abstract)

Polydoros Petrakis , Technological Educational Institute of Crete, GR
Mohammed Abuteir , University of Siegen, DE
Miltos D. Grammatikakis , Technological Educational Institute of Crete, GR
Kyprianos Papadimitriou , Technological Educational Institute of Crete, GR
Roman Obermaisser , University of Siegen, DE
Zaher Owda , University of Siegen, DE
Antonis Papagrigoriou , Technological Educational Institute of Crete, GR
Michael Soulie , STMicroelectronics, FR
Marcello Coppola , STMicroelectronics, FR
pp. 164-169

Combining GPU and FPGA technology for efficient exhaustive interaction analysis in GWAS (Abstract)

Jan Christian Kassens , Kiel University. Department of Computer Science, Germany
Lars Wienbrandt , Kiel University. Department of Computer Science, Germany
Manfred Schimmler , Kiel University. Department of Computer Science, Germany
Jorge Gonzalez-Dominguez , University of A Coruña, Computer Architecture Group, Spain
Bertil Schmidt , Johannes Gutenberg University Mainz, Institute of Computer Science, Germany
pp. 170-175

Accelerating K-means clustering on a tightly-coupled processor-FPGA heterogeneous system (Abstract)

Tarek S. Abdelrahman , The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Ontario M5S 3G4, Canada
pp. 176-181

Design space exploration and constrained multiobjective optimization for digital predistortion systems (Abstract)

Lin Li , University of Maryland, College Park, ECE Department, 20742, USA
Amanullah Ghazi , University of Oulu, Dept. Computer Science and Engineering, Finland
Jani Boutellier , University of Oulu, Dept. Computer Science and Engineering, Finland
Lauri Anttila , Tampere University of Technology, Dept. Electronics and Communications Engineering, Finland
Mikko Valkama , Tampere University of Technology, Dept. Electronics and Communications Engineering, Finland
Shuvra S. Bhattacharyya , University of Maryland, College Park, ECE Department, 20742, USA
pp. 182-185

A hardware accelerator for the alignment of multiple DNA sequences in forensic identification (Abstract)

Antonyus P. A. Ferreira , Informatics Center, Federal University of Pernambuco Recife, Brazil
Joao G. M. Silva , Informatics Center, Federal University of Pernambuco Recife, Brazil
Jefferson R. L. Anjos , Informatics Center, Federal University of Pernambuco Recife, Brazil
Luiz H. A. Figueiroa , Informatics Center, Federal University of Pernambuco Recife, Brazil
Edna N. S. Barros , Informatics Center, Federal University of Pernambuco Recife, Brazil
Manoel E. Lima , Informatics Center, Federal University of Pernambuco Recife, Brazil
Victor W. C. Medeiros , Department of Statistics and Informatics, Federal Rural University of Pernambuco, Recife, Brazil
pp. 186-190

Real time all intra HEVC HD encoder on FPGA (Abstract)

Sachille Atapattu , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Namitha Liyanage , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Nisal Menuka , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Ishantha Perera , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Ajith Pasqual , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
pp. 191-195

Parametrized system level design: Real-time X-Ray image processing case study (Abstract)

Tsvetan Shoshkov , Faculty of Electronics, Technical University of Sofia, Bulgaria
Todor Stefanov , Leiden Institute of Advanced Computer Science, Leiden University, The Netherlands
Bart Kienhuis , Leiden Institute of Advanced Computer Science, Leiden University, The Netherlands
pp. 196-201

Pipelined FPGA implementation of numerical integration of the Hodgkin-Huxley model (Abstract)

Roberto R. Osorio , University of A Coruña, Dept. Electronics and Systems, Spain
pp. 202-206

FPGA-based frequency estimation of a DFB laser using Rb spectroscopy for space missions (Abstract)

Christian Spindeldreier , Institute of Microelectronic Systems, Leibniz Universität Hannover, 30167, Germany
Thijs Wendrich , Institut für Quantenoptik, Leibniz Universität Hannover, 30167, Germany
Ernst Maria Rasel , Institut für Quantenoptik, Leibniz Universität Hannover, 30167, Germany
Wolfgang Ertmer , Institut für Quantenoptik, Leibniz Universität Hannover, 30167, Germany
Holger Blume , Institute of Microelectronic Systems, Leibniz Universität Hannover, 30167, Germany
pp. 207-212

Bridging the FPGA programmability-portability Gap via automatic OpenCL code generation and tuning (Abstract)

Konstantinos Krommydas , Dept. of Computer Science, Virginia Tech, USA
Ruchira Sasanka , Intel Corporation, USA
Wu-chun Feng , Dept. of Computer Science, Virginia Tech, USA
pp. 213-218

Configuration technique for adaptability of multicore processors on FPGA (Abstract)

Tetsuo Miyauchi , Japan Advanced Institute of Science and Technology, Japan
Kiyofumi Tanaka , Japan Advanced Institute of Science and Technology, Japan
pp. 219-220

Performance optimization of Jacobi stencil algorithms based on POWER8 architecture (Abstract)

Jingheng Xu , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Haohuan Fu , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Lin Gan , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
Yu Song , BM China Systems and Technology Laboratory, China
Hongbo Peng , BM China Systems and Technology Laboratory, China
Guangwen Yang , Ministry of Education Key Lab. for Earth System Modeling, Center for Earth System Science, Tsinghua University, China
pp. 221-222

Display power reduction for mobile closed-source games (Abstract)

Zhinan Cheng , Department of Computer Science and Technology, USTC, Hefei, 230027, China
Xi Li , Department of Computer Science and Technology, USTC, Hefei, 230027, China
Jiachen Song , Department of Computer Science and Technology, USTC, Hefei, 230027, China
Beilei Sun , Department of Computer Science and Technology, USTC, Hefei, 230027, China
Xuehai Zhou , Department of Computer Science and Technology, USTC, Hefei, 230027, China
Chao Wang , Department of Computer Science and Technology, USTC, Hefei, 230027, China
pp. 223-224

An efficient embedded processor for object detection using ASIP methodology (Abstract)

Shanlin Xiao , Department of Communications and Computer Engineering, Tokyo Institute of Technology, Japan 152-8552
Tsuyoshi Isshiki , Department of Communications and Computer Engineering, Tokyo Institute of Technology, Japan 152-8552
Dongju Li , Department of Communications and Computer Engineering, Tokyo Institute of Technology, Japan 152-8552
Hiroaki Kunieda , Department of Communications and Computer Engineering, Tokyo Institute of Technology, Japan 152-8552
pp. 225-226

An ESL framework for low power architecture design space exploration (Abstract)

Hend Affes , Univ. Nice Sophia Antipolis, LEAT, CNRS, UMR 7248, France
Amal Ben Ameur , Univ. Nice Sophia Antipolis, LEAT, CNRS, UMR 7248, France
Michel Auguin , Univ. Nice Sophia Antipolis, LEAT, CNRS, UMR 7248, France
Francois Verdier , Univ. Nice Sophia Antipolis, LEAT, CNRS, UMR 7248, France
Calypso Barnes , Univ. Nice Sophia Antipolis, LEAT, CNRS, UMR 7248, France
pp. 227-228

soft-NEON: A study on replacing the NEON engine of an ARM SoC with a reconfigurable fabric (Abstract)

Jose Raul Garcia Ordaz , School of Computer Science, The University of Manchester, Oxford Road, United Kingdom
Dirk Koch , School of Computer Science, The University of Manchester, Oxford Road, United Kingdom
pp. 229-230

Architecture for fractal dimension estimation based on Minkowski-Bouligand method using integer distances (Abstract)

Isabela Rossales , Departamento de Engenharia Elétrica e de Computação - EESC, Universidade de São Paulo, São Carlos, Brazil
Maximiliam Luppe , Departamento de Engenharia Elétrica e de Computação - EESC, Universidade de São Paulo, São Carlos, Brazil
pp. 231-232

SHA-3 Instruction Set Extension for A 32-bit RISC processor architecture (Abstract)

Ahmed S. Eissa , Electrical Engineering Department, Faculty of Engineering, Alexandria University, Egypt
Mahmoud A. Elmohr , Electrical Engineering Department, Faculty of Engineering, Alexandria University, Egypt
Mostafa A. Saleh , Electrical Engineering Department, Faculty of Engineering, Alexandria University, Egypt
Khaled E. Ahmed , Electrical Engineering Department, Faculty of Engineering, Alexandria University, Egypt
Mohammed M. Farag , Electrical Engineering Department, Faculty of Engineering, Alexandria University, Egypt
pp. 233-234

Temporized data prefetching algorithm for NoC-based multiprocessor systems (Abstract)

Maria Cireno , Informatics Center, Federal University of Pernambuco, UFPE, Recife, Brazil
Andre Aziz , Statistics and Informatics Department, Federal Rural University of Pernambuco, UFRPE, Recife, Brazil
Edna Barros , Informatics Center, Federal University of Pernambuco, UFPE, Recife, Brazil
pp. 235-236

HW/SW co-design based implementation of Gas discrimination (Abstract)

Amine Ait Si Ali , College of Engineering, Qatar University, Doha, Qatar, P. O. Box: 2713
Abbes Amira , College of Engineering, Qatar University, Doha, Qatar, P. O. Box: 2713
Faycal Bensaali , College of Engineering, Qatar University, Doha, Qatar, P. O. Box: 2713
Mohieddine Benammar , College of Engineering, Qatar University, Doha, Qatar, P. O. Box: 2713
Amine Bermak , College of Science and Engineering, Hamad Bin Khalifa University, Doha, Qatar, P. O. Box: 5825
pp. 237-238

Architecture for quadruple precision floating point division with multi-precision support (Abstract)

Manish Kumar Jaiswal , Dept. of EEE, The University of Hong Kong, Hong Kong
Hayden K.-H So , Dept. of EEE, The University of Hong Kong, Hong Kong
pp. 239-240

Oolong: A Baseband processor extension to the RISC-V ISA (Abstract)

Cecil Accetti R. A. Melo , CIn - Informatics Center, Federal University of Pernambuco - UFPE, Recife, Brazil
Edna Barros , CIn - Informatics Center, Federal University of Pernambuco - UFPE, Recife, Brazil
pp. 241-242

Relation-oriented resource allocation for multi-accelerator systems (Abstract)

Teng Yu , Imperial College London, UK
Bo Feng , Tsinghua University, China
Mark Stillwell , Cisco Meraki, UK
Jose Gabriel F Coutinho , Imperial College London, UK
Wenlai Zhao , Tsinghua University, China
Shuang Liang , Tsinghua University, China
Wayne Luk , Imperial College London, UK
Alexander L. Wolf , Imperial College London, UK
Yuchun Ma , Tsinghua University, China
pp. 243-244
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