2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) (2007)
Montreal, QC, Canada
July 9, 2007 to July 11, 2007
Muhammad Omer Cheema , ENSTA, 32 Boulevard Victor, 75739 Paris, France
Omar Hammami , ENSTA, 32 Boulevard Victor, 75739 Paris, France
Lionel Lacassagne , IEF, University of Paris Sud, 91405 Orsay, France
Alain Merigot , IEF, University of Paris Sud, 91405 Orsay, France
Transaction Level Modeling (TLM) and component based software development approaches accelerate the process of an embedded system design and simulation and hence improve the overall productivity. On the other hand, system level design languages facilitate the fast hardware synthesis at behavioral level of abstraction. In this paper, we introduce an approach for Hardware/Software codesign of image processing application that uses TLM and component based software design approaches along with HW synthesis using SystemC to accelerate system design and verification process. Our experiments performed over an image processing application shows the effectiveness of our methodology.
A. Merigot, L. Lacassagne, O. Hammami and Muhammad Omer Cheema, "Hardware /software codesign of image processing applications using Transaction Level Modeling," 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP), Montreal, QC, Canada, 2007, pp. 46-52.