2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05) (2005)
July 23, 2005 to July 25, 2005
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2005.47
Jo?o M. P. Cardoso , Campus de Gambelas, 8000 - 117 Faro, Portugal
<p>This paper presents recent advances in a compiler infrastructure to map algorithms described in a Java subset to FPGA-based platforms. We explain how delays and resources are estimated to guide the compiler through scheduling and temporal partitioning. The compiler supports complex analytical models to estimate resources and delays for each functional unit. The paper presents experimental results for a number of benchmarks. Those results also arrise a question when performing temporal partitioning: shall we try to group as many computational structures in the same configuration or shall we have several configurations?</p>
J. M. Cardoso, "On Estimations for Compiling Software to FPGA-based Systems," 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05)(ASAP), Samos, Greece, 2005, pp. 225-230.