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Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004. (2004)
Galveston, Texas
Sept. 27, 2004 to Sept. 29, 2004
ISSN: 1063-6862
ISBN: 0-7695-2226-2
pp: 152-166
Casper Lageweg , Delft University of Technology, The Netherlands
Sorin Cotofana , Delft University of Technology, The Netherlands
Stamatis Vassiliadis , Delft University of Technology, The Netherlands
ABSTRACT
This paper investigates single electron tunneling based implementations of 16 and 32-bit tree multipliers operating according to the single electron encoded logic paradigm. First, we propose implementations for a set of basic components (3/2 counter, 7/3 counter)and verify them by means of simulation. Second, we propose 16 and 32-bit tree multipliers based on these components, and analyze these multipliers in terms of area, delay and power consumption. Third, we investigate alternative designs for the 32-bit multiplier and conclude that the 7/3 counter based implementations are less effective than expected. We consequently propose improved 7/3 counters and evaluate the implications of these new designs on the area, delay and power consumption of the 16 and 32-bit multipliers.
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CITATION

S. Cotofana, C. Lageweg and S. Vassiliadis, "Binary Multiplication based on Single Electron Tunneling," Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004.(ASAP), Galveston, Texas, 2004, pp. 152-166.
doi:10.1109/ASAP.2004.10019
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