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2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (2003)
The Hague, The Netherlands
June 24, 2003 to June 26, 2003
ISSN: 1063-6862
ISBN: 0-7695-1992-X
TABLE OF CONTENTS
Keynote
Session 1: Models, Methods and Tools

Context-Aware Process Networks (Abstract)

Henk J. Sips , Delft University of Technology, ITS
Hylke W. van Dijk , Delft University of Technology, ITS
Ed F. Deprettere , Leiden University, LIACS
pp. 6

Multi-dimentsional Incremetal Loops Fusion for Data Locality (Abstract)

Gerda Janssens , K.U.Leuven Depart. Computerwetenschappen
Maurice bruynooghe , K.U.Leuven Depart. Computerwetenschappen
pp. 17

Hardware Synthesis for Multi-Dimensional Time (Abstract)

Anne-Claire Guillou , Irisa Campus de Beaulieu
Patrice Quinton , Irisa Campus de Beaulieu
Tanguy Risset , Inria, Lip, ENS-Lyon
pp. 40
Session 2: Design Methodology

Systematic Register Bypass Customization for Application-Specific Processors (Abstract)

Scott Mahlke , University of Michigan
Nathan Clark , University of Michigan
Michael Chu , University of Michigan
Rajiv Ravindran , University of Michigan
Mikhail Smelyanskiy , University of Michigan
K. V. Manjunath , University of Michigan
Kevin Fan , University of Michigan
pp. 64

Energy Aware Register File Implementation through Instruction Predecode (Abstract)

Carlos A. Lopez , Departamento de Ingenier?a Electronica
Jose L. Ayala , Departamento de Ingenier?a Electronica
Marisa Lopez-Vallejo , Departamento de Ingenier?a Electronica
Alexander Veidenbaum , Center for Embedded Computer Systems
pp. 86

Automatic Instruction Set Extension and Utilization for Embedded Processors (Abstract)

Laura Pozzil , Swiss Federal Institute of Technology Lausanne
Paolo Ienne , Swiss Federal Institute of Technology Lausanne
Giovanni De Micheli , Stanford University
Armita Peymandoust , Stanford University
pp. 108
Session 3: Invited Session . Nanocomputing Technology and Systems

Reconfigurable Computing and Electronic Nanotechnology (Abstract)

Girish Venkataramani , Carnegie Mellon University
Seth Goldstein , Carnegie Mellon University
Mahim Mishra , Carnegie Mellon University
Mihai Budiu , Carnegie Mellon University
pp. 132
Session 4: Processors

Using Media Processors for Low-Memory AES Implementation (Abstract)

D. Page , Department of Computer Science, University of Bristol
J. Irwin , Zarlink Semiconductor Inc.
pp. 144

Variable-Length Instruction Compression for Area Minimization (Abstract)

Piia Simonen , Institute of Digital and Computer Systems, Tampere University of Technology
Ilkka Saastamoinen , Institute of Digital and Computer Systems, Tampere University of Technology
Jari Nurmi , Institute of Digital and Computer Systems, Tampere University of Technology
pp. 155

A Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization (Abstract)

Andreas Hoffmann , CoWare, Inc
Achim Nohl , Aachen University of Technology
Andreas Wieferink , Aachen University of Technology
Tim Kogel , Aachen University of Technology
pp. 161
Session 5: Numeric Co-Processors

A floating-point CORDIC based SVD processor (Abstract)

Z. Liu , DSiP Laboratories, Queen?s University of Belfast, Belfast, N. Ireland
J. V. McCanny , DSiP Laboratories, Queen?s University of Belfast, Belfast, N. Ireland
K. Dickson , DSiP Laboratories, Queen?s University of Belfast, Belfast, N. Ireland
pp. 194

Combined Multiplication and Sum-of-Squares Units (Abstract)

Louis Marquette , CSE Dept., Lehigh University, Bethlehem, PA
Michael J. Schulte , Dept. of ECE, University of Wisconsin-Madison, Madison, WI
John Glossner , Sandbridge Technologies, White Plains, NY
E. George Walters III , CSE Dept., Lehigh University, Bethlehem, PA
Shankar Krithivasan , Dept. of ECE, University of Wisconsin-Madison, Madison, WI
pp. 204

Comparison of Branching CORDIC Implementations (Abstract)

Abhishek Singh , University of Maryland Baltimore County (UMBC)
Tom Goff , University of Maryland Baltimore County (UMBC)
Chintan Patel , University of Maryland Baltimore County (UMBC)
Dhananjay S Phatak , University of Maryland Baltimore County (UMBC)
James Plusquellic , University of Maryland Baltimore County (UMBC)
Mike Riggs , University of Maryland Baltimore County (UMBC)
pp. 215

Unified Radix-4 Multiplier for GF(p) and GF(2^n) (Abstract)

Lai-Sze Au , Cardiff School of Engineering, Queen?s Buildings,The Parade,
Neil Burgess , Cardiff School of Engineering, Queen?s Buildings,The Parade,
pp. 226

Arbitrary Bit Permutations in One or Two Cycles (Abstract)

Zhijie Shi , Department of Electrical Engineering, Princeton University
Xiao Yang , Department of Electrical Engineering, Princeton University
Ruby B. Lee , Department of Electrical Engineering, Princeton University
pp. 237
Session 6: Multimedia Architectures

Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor (Abstract)

Sorin Cotofana , Delft University of Technology, Delft, The Netherlands
Mihai Sima , Delft University of Technology, Delft, The Netherlands/Philips Research Laboratories, Eindhoven, The Netherlands
Jos T.J. van Eijidhoven , Philips Research Laboratories, Eindhoven, The Netherlands
Stamatis Vassiliadis , Delft University of Technology, Delft, The Netherlands
pp. 250

Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers (Abstract)

Frank Livingston , Department of Electrical and Computer Engineering, Houston, TX 77005
Joseph Cavallaro , Department of Electrical and Computer Engineering, Houston, TX 77005
Vikram Chandrasekhar , Department of Electrical and Computer Engineering, Houston, TX 77005
pp. 260

An Efficient Disk-Array-Based Server Design for a Multicast Video Streaming System (Abstract)

P.H. Chan Patton , The Chinese University of Hong Kong
Y.B. Lee Jack , The Chinese University of Hong Kong
pp. 271

An Efficient PIM (Processor-In-Memory) Architecture for Motion Estimation (Abstract)

Jung-Yup Kang , University of Southern California
Jean-Luc Gaudiot , University of California at Irvine
Saurabh Shah , University of California at Irvine
Sandeep Gupta , University of Southern California
pp. 282

A VLSI Architecture for Advanced Video Coding Motion Estimation (Abstract)

Yap John V. McCanny , University of Belfast, Ashby Building, Stranmillis Road, Belfast BT9 5AH, Northern
Swee Yeow , University of Belfast, Ashby Building, Stranmillis Road, Belfast BT9 5AH, Northern
pp. 293
Session 7: Computer Arithmetic

Complex Division with Prescaling of Operands (Abstract)

Jean-Michel Muller , Ecole Normale Superieure de Lyon
pp. 304

Iterative Methods for Logarithmic Subtraction (Abstract)

Mark G. Arnold , Lehigh University Bethlehem.
pp. 315

A Family of Parallel-Pre.x Modulo 2n - 1 Adders (Abstract)

G. Dimitrakopoulos , Computer Engineering and Informatics Dept., University of Patras, 26500 Patras, Greece
C. Efstathiou , Informatics Dept., TEI of Athens, 12210 Egaleo, Athens, Greece.
D. Nikolos , Computer Technology Institute, 3 Kolokotroni Str., 26221 Patras, Greece Computer Engineering and Informatics Dept., University of Patras, 26500 Patras, Greece
H. T. Vergos , Computer Technology Institute, 3 Kolokotroni Str., 26221 Patras, Greece Computer Engineering and Informatics Dept., University of Patras, 26500 Patras, Greece
pp. 326

Performance-Improved Computation of Very Large Word-Length LNS Addition/Subtraction Using Signed-Digit Arithmetic (Abstract)

Chichyang Chen , Department of Information Engineering and Computer Science
Rui-Lin Chen , Department of Information Engineering and Computer Science
pp. 337

Decimal Multiplication Via Carry-Save Addition (Abstract)

Michael J. Schulte , University of Wisconsin - Madison
Mark A. Erle , Lehigh University
pp. 348
Session 8: Signal Processing Architectures

Reconfigurable Viterbi Decoding Using a New ACS Pipelining Technique (Abstract)

Mohammed Benaissa , The University of Sheffield
Yiqun Zhu , The University of Sheffield
pp. 360

Application-Specific DSP Architecture For Fast Fourier Transform (Abstract)

Sung M. Cho , School of Electrical and Computer Engineering, Ajou University
Myung H. Sunwoo , School of Electrical and Computer Engineering, Ajou University
Kyung L. Heo , School of Electrical and Computer Engineering, Ajou University
Jung H. Lee , School of Electrical and Computer Engineering, Ajou University
pp. 369

An Architecture for a Radix-4 Modular Pipeline Fast Fourier Transform (Abstract)

Earl E. Swartzlander, Jr. , The University of Texas at Austin
Ayman M. El-Khashab , The University of Texas at Austin
pp. 378

Area and Time Efficient Modular Multiplication of Large Integers (Abstract)

Viktor Bunimov , University of Braunschweig, Germany
Prof. Dr. Manfred Schimmler , University of Braunschweig, Germany
pp. 400
Session 9: Cryptography

Hardware Implementation of an Elliptic Curve Processor over GF(p) (Abstract)

Lejla Batina , SafeNet BV/Katholieke Universiteit Leuven, ESAT/SCD-COSIC
Joos Vandewalle , Katholieke Universiteit Leuven, ESAT/SCD-COSIC
S?dd?ka Berna Ors , Katholieke Universiteit Leuven, ESAT/SCD-COSIC
Bart Preneel , Katholieke Universiteit Leuven, ESAT/SCD-COSIC
pp. 433

A Cryptograhpic Processor for Arbitrary Elliptic Curves over (Abstract)

Nils Gura , Sun Microsystems Laboratories
Hans Eberle , Sun Microsystems Laboratories
Sheueling Chang-Shantz , Sun Microsystems Laboratories
pp. 444
Author Index

Author Index (PDF)

pp. 469
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