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2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (1996)
Chicago, IL
Aug. 19, 1996 to Aug. 23, 1996
ISSN: 1063-6862
ISBN: 0-8186-7542-X
pp: 293
J. Watson , Xilinx Inc., San Jose, CA, USA
B.K. Fawcett , Xilinx Inc., San Jose, CA, USA
ABSTRACT
In-system-programmable, SRAM-based Field Programmable Gate Arrays (FPGAs) can be used to create processors and coprocessors whose internal architecture as well as interconnections can be reconfigured to match the needs of a given application. Exploiting the inherent speed and parallelism of a hardware solution, FPGA-based coprocessors can execute computationally-intensive tasks while maintaining the flexibility of a programmable solution. The successes of this approach have led to the introduction of the first FPGA devices designed for coprocessing applications; the XC6200 FPGA architecture features an SRAM control store, abundant registers, on-chip memory capability, support for high-speed full or partial reconfiguration, and a flexible, hierarchical routing scheme.
INDEX TERMS
field programmable gate arrays; reconfigurable architectures; coprocessors; SRAM chips; reconfigurable processing; SRAM-based field programmable gate arrays; processors; coprocessors; internal architecture; interconnections; computationally-intensive tasks; programmable solution; XC6200 FPGA architecture; SRAM control store; on-chip memory capability
CITATION
J. Watson, B.K. Fawcett, "Reconfigurable Processing With Field Programmable Gate Arrays", 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors, vol. 00, no. , pp. 293, 1996, doi:10.1109/ASAP.1996.542824
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