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Advanced Research in VLSI, Conference on (2001)
Salt Lake City, Utah
Mar. 14, 2001 to Mar. 16, 2001
ISBN: 0-7695-1038-8
TABLE OF CONTENTS

Foreword (PDF)

pp. vii

Acknowledgments (PDF)

pp. viii
Paper Session 1: Asynchronous VLSI - Chair: Wendy Belluomini

Precise Exceptions in Asynchronous Processors (Abstract)

Rajit Manohar , Cornell University
Alain J. Martin , California Institute of Technology
Mika Nystrom , California Institute of Technology
pp. 16

A Low-Power Asynchronous VLSI FIR Filter (Abstract)

E. Grass , IHP-GmbH
V.A. Bartlett , University of Westminster,
pp. 29
Paper Session 2: Reduced Energy - Chair: Jose Tierno

Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier (Abstract)

Conrad H. Ziesler , University of Michigan
Suhwan Kim , University of Michigan
Marios C. Papaefthymiou , University of Michigan
pp. 42

Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy (Abstract)

Krste Asanovic , MIT Laboratory for Computer Science
Ronny Krashinsky , MIT Laboratory for Computer Science
Seongmoo Heo , MIT Laboratory for Computer Science
pp. 59

Logic Design Considerations for 0.5-Volt CMOS (Abstract)

Jack Venbrux , University of New Mexico
K. Joseph Hass , University of New Mexico
Prakash Bhatia , University of New Mexico
pp. 75
Paper Session 3: Signaling - Chair: Mircea Stan

Dynamic Receiver Biasing For Inter-Chip Communication (Abstract)

Claude R. Gauthier , Sun Microsystems
Richard B. Brown , The University of Michigan
Jayakumaran Sivagnaname , The University of Michigan
pp. 101

Width-Adaptive Data Word Architectures (Abstract)

Rajit Manohar , Cornell University
pp. 112
Paper Session 4: Analog Circuits - Chair: Dave Schimmel

Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS (Abstract)

Jie Dai , University of Utah
Chris Winstead , University of Utah
Woo Jin Kim , University of Utah
Chris Myers , University of Utah
Christian Schlegel , University of Utah
Yong-Bin Kim , University of Utah
Scott Little , University of Utah
pp. 132

Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits (Abstract)

Matt Kucic , Georgia Institute of Technology
Jeff Dugger , Georgia Institute of Technology
Paul Hasler , Georgia Institute of Technology
David Anderson , Georgia Institute of Technology
pp. 148

Dynamic Charge Restoration of Floating Gate Subthreshold MOS Translinear Circuits (Abstract)

Rodney Goodman , California Institute of Technology
Vincent F. Koosh , California Institute of Technology
pp. 163

Analog-Digital Partitioning for Field-Programmable Mixed Signal Systems (Abstract)

Ranga Vemuri , University of Cincinnati
Sree Ganesan , University of Cincinnati
pp. 172
Paper Session 5: Arithmetic Circuits - Chair: Rajit Manohar

A High-Performance 64-bit Adder Implemented in Output Prediction Logic (Abstract)

Carl Sechen , University of Washington
Sheng Sun , University of Washington
Larry McMurchie , University of Washington
pp. 213
Paper Session 6: Focal-Plane/Image Computation - Chair: Reid Harrison

Focal-Plane Image and Beam Quality Sensors for Adaptive Optics (Abstract)

Gary Carhart , Army Research Laboratory
Marc Cohen , Johns Hopkins University
Mikhail Vorontsov , Army Research Laboratory
Gert Cauwenberghs , Johns Hopkins University
pp. 224

Methods and Circuits for Focal-Plane Computation of Features in CMOS Visual Sensors (Abstract)

Alberto Pesavento , California Institute of Technology
Christof Koch , California Institute of Technology
pp. 238

Visual Sensor with Resolution Enhancement by Mechanical Vibrations (Abstract)

Ania Mitros , California Institute of Technology
Christof Koch , California Institute of Technology
Oliver Landolt , California Institute of Technology
pp. 249

Author Index (PDF)

pp. 265
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