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Computer Arithmetic, IEEE Symposium on (2003)
Santiago de Compostela, Spain
June 15, 2003 to June 18, 2003
ISSN: 1063-6889
ISBN: 0-7695-1894-X
TABLE OF CONTENTS
Introduction

Foreword (PDF)

pp. viii

Dedication (PDF)

pp. ix

Committees (PDF)

pp. x
Session 1: Keynote Talk
Session 2: Multiplication

High-Performance Left-to-Right Array Multiplier Design (Abstract)

Zhijun Huang , University of California at Los Angeles
Miloš D. Ercegovac , University of California at Los Angeles
pp. 4

Some Optimizations of Hardware Multiplication by Constant Matrices (Abstract)

Arnaud Tisserand , École Normale Supérieure de Lyon
Nicolas Boullis , École Normale Supérieure de Lyon
pp. 20
Session 3: Division

Revisiting SRT Quotient Digit Selection (Abstract)

Peter Kornerup , University of Southern Denmark
pp. 38

SRT Division Algorithms as Dynamical Systems (Abstract)

Mark McCann , University of British Columbia
Nicholas Pippenger , University of British Columbia
pp. 46

A New Iterative Structure for Hardware Division: The Parallel Paths Algorithm (Abstract)

Richard Hughey , University of California at Santa Cruz
Eric Rice , University of California at Santa Cruz
pp. 54

Prescaled Integer Division (Abstract)

Alex Fit-Florea , Southern Methodist University
David W. Matula , Southern Methodist University
pp. 63
Session 4: Floating Point

Hardware Implementations of Denormalized Numbers (Abstract)

Son Dao Trong , IBM Server Division
Eric M. Schwarz , IBM Server Division
Martin Schmookler , IBM Server Division
pp. 70

Representable Correcting Terms for Possibly Underflowing Floating Point Operations (Abstract)

Marc Daumas , Laboratoire de l?Informatique du Parall?lisme
Sylvie Boldo , Laboratoire de l?Informatique du Parall?lisme
pp. 79

High Performance Floating-Point Unit with 116 Bit Wide Divider (Abstract)

Guenter Gerwig , IBM Server Division
Holger Wetter , IBM Server Division
Eric M. Schwarz , IBM Server Division
Juergen Haess , IBM Server Division
pp. 87
Session 5: Decimal Arithmetic and Revisions to the IEEE 754 Standard

Decimal Floating-Point: Algorism for Computers (Abstract)

Michael F. Cowlishaw , IBM UK Ltd. and University of Warwick
pp. 104
Session 6: Elementary Functions

Theorems on Efficient Argument Reductions (Abstract)

Marc Daumas , Laboratoire de léInformatique du Parallélisme
Ren-Cang Li , University of Kentucky
Sylvie Boldo , Laboratoire de léInformatique du Parallélisme
pp. 129
Session 7: Testing and Error Analysis

Worst Cases and Lattice Reduction (Abstract)

Vincent Lefèvre , Technopôle de Nancy-Brabois
Damien Stehlé , ENS Paris
Paul Zimmermann , Technopôle de Nancy-Brabois
pp. 142

Solving Range Constraints for Binary Floating-Point Instructions (Abstract)

Abraham Ziv , IBM Research Labs
Merav Aharoni , IBM Research Labs
Sigal Asaf , IBM Research Labs
pp. 158

A Parametric Error Analysis of Goldschmidt?s Division Algorithm (Abstract)

Peter-Michael Seidel , Southern Methodist University
Guy Even , Tel-Aviv University
pp. 165
Session 8: Cryptography

Efficient Multiplication in GF(p<sup>k</sup>) for Elliptic Curve Cryptography (Abstract)

C. N?gre , Laboratoire d?Informatique de Robotique et de Micro?lectronique de Montpellier
J.-C. Bajard , Laboratoire d?Informatique de Robotique et de Micro?lectronique de Montpellier
L. Imbert , Laboratoire d?Informatique de Robotique et de Micro?lectronique de Montpellier
T. Plantard , Laboratoire d?Informatique de Robotique et de Micro?lectronique de Montpellier
pp. 181
Session 9: Powering, Multiplication, and Counters

High-Radix Iterative Algorithm for Powering Computation (Abstract)

J.-A. Piñeiro , Universidad Santiago de Compostela, Spain
J. D. Bruguera , Universidad Santiago de Compostela, Spain
M. D. Ercegovac , University of California at Los Angeles
pp. 204

On-Line Multiplication in Real and Complex Base (Abstract)

Athasit Surarerks , Chulalongkorn University
Christiane Frougny , LIAFA, CNRS UMR and Université Paris 8
pp. 212

A VLSI Algorithm for Modular Multiplication/Division (Abstract)

Marcelo E. Kaihara , Nagoya University
Naofumi Takagi , Nagoya University
pp. 220

Saturating Counters: Application and Design Alternatives (Abstract)

Yaron Koren , Bear Stearns
Bejoy G. Oomman , Genesys Testware
Israel Koren , University of Massachusetts at Amherst
pp. 228
Session 10: Number Systems

Error-Free Arithmetic for Discrete Wavelet Transforms Using Algebraic Integers (Abstract)

G. A. Jullien , University of Calgary
K. A. Wahid , University of Calgary
V. S. Dimitrov , University of Calgary
pp. 238

On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge (Abstract)

Sorin Cotofana , Delft University of Technology
Casper Lageweg , Delft University of Technology
Stamatis Vassiliadis , Delft University of Technology
pp. 245

The Interval Logarithmic Number System (Abstract)

Mark G. Arnold , Lehigh University
Michael J. Schulte , University of Wisconsin-Madison
Jesus Garcia , Lehigh University
pp. 253
Session 11: Modeling and Design of Arithmetic Components

Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders (Abstract)

Bart R. Zeydel , University of California at Davis
Vojin G. Oklobdzija , University of California at Davis
Hoang Dao , University of California at Davis
Sanu Mathew , Intel Corporation
Ram Krishnamurthy , Intel Corporation
pp. 272
Author Index

Author Index (PDF)

pp. 281
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