Arithmetic of finite fields (PDF)

Complement representations in the Fibonacci computer (PDF)

The conversion of Hensel codes to rational numbers (PDF)

Towards quantitative comparison of computer number systems (PDF)

A systematic approach to the design of structures for arithmetic (PDF)

A chip-set for a high-speed low-cost floating-point unit (PDF)

Compound algorithms for digit online arithmetic (PDF)

Design of a digit-slice on-line arithmetic unit (PDF)

Floating-point on-line arithmetic: Algorithms (PDF)

Floating-point on-line arithmetic: Error analysis (PDF)

A simulator for on-line arithmetic (PDF)

Algorithms for extracting square roots and cube roots (PDF)

Compatible hardware for division and square root (PDF)

An algorithm for modular exponentiation (PDF)

High bandwidth evaluation of elementary functions (PDF)

Residue arithmetic with rational operands (PDF)

Sign detection in the Symmetric Residue Number System (PDF)

Extension of the MC68000 architecture to include Standard Floating-point arithmetic (PDF)

Case study of a VLSI design project: A simple inner product machine (PDF)

VAX hardware for the proposed IEEE floating-point standard (PDF)

Partitioned algorithms and VLSI structures for large-scale matrix computations (PDF)

An integrated rational arithmetic unit (PDF)

A rational arithmetic processor (PDF)

A fast multi-operand multiplication scheme (PDF)

Algorithms for parallel addition and parallel polynomial evaluation (PDF)

On an interval arithmetic and its applications (PDF)