Architectures for Networking and Communications Systems (2011)
Brooklyn, New York USA
Oct. 3, 2011 to Oct. 4, 2011
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ANCS.2011.40
This paper describes the Net COPE platform porting issues to the new generation of the Net FPGA(-10G) cards. Achieved throughput and CPU utilization for various length of packets was measured. It was shown that we are able to reach maximum throughput of 12Gbps without any significant processor load. Xilinx ISE reports approximately 30% of the Net FPGA chip utilization for design running on 200MHz.
FPGA, NetCOPE, NetFPGA-10G
V. Kosar, M. Zadnik, P. Korcek, P. Kastovsky and K. Koranda, "Hacking NetCOPE to Run on NetFPGA-10G," 2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Brooklyn, NY, 2011, pp. 217-218.