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Adaptive Hardware and Systems, NASA/ESA Conference on (2008)
June 22, 2008 to June 25, 2008
ISBN: 978-0-7695-3166-3
pp: 114-121
ABSTRACT
Majority voting is a commonly used approach to increase system reliability. Standard triple-module-redundancy (TMR) methods are frequently used in space applications. Using these methods, triple modules and voting circuits are implemented onto an Application Specific Integrated Circuit (ASIC) or an FPGA. When a single event upset occurs, the voting circuit neglects the failure value of a module receiving the single event upset and takes a correct value of the other two modules not receiving it.However, the triple-module implementation requires a large implementation area on VLSIs. Therefore, to reduce the area of TMR implementation, this paper presents a novel double or triple module redundancy (DTMR) method for dynamically reconfigurable devices using a design example of a state machine. Furthermore, this paper presents experimental results of the method using a highly reliable optically reconfigurable gate array.
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CITATION

M. Watanabe and K. Shinohara, "A Double or Triple Module Redundancy Model Exploiting Dynamic Reconfigurations," Adaptive Hardware and Systems, NASA/ESA Conference on(AHS), vol. 00, no. , pp. 114-121, 2008.
doi:10.1109/AHS.2008.67
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