Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers (1994)
Pacific Grove, CA, USA
Oct. 31, 1994 to Nov. 2, 1994
L. Mintzer , Momentum Data Syst., Costa Mesa, CA, USA
While the general purpose logic elements of the field programmable gate array (FPGA) appear to be unlikely candidates for implementing the multiply-intensive operations of digital filtering, the application of distributed arithmetic (DA) techniques turns the FPGA into a worthy contender. Indeed, in some important filter applications the Xilinx 4000 family of FPGAs offers superior performance over the fastest fixed point DSP microprocessors. A brief description of DA processing is presented to provide some background for the filter design examples that are presented. A simple FIR filter will serve to establish the design concepts, and a two dimensional Sobel edge detector will serve to illustrate the performance capabilities of this approach.<
FIR filters, filtering theory, digital arithmetic, edge detection, field programmable gate arrays
L. Mintzer, "Digital filtering in FPGAs," Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers(ACSSC), Pacific Grove, CA, USA, 1995, pp. 1373-1377.