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Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers (1994)
Pacific Grove, CA, USA
Oct. 31, 1994 to Nov. 2, 1994
ISSN: 1058-6393
ISBN: 0-8186-6405-3
pp: 1058-1062
M.D. Derk , Sch. of Comput. Sci., Oklahoma Univ., Norman, OK, USA
L.S. DeBrunner , Sch. of Comput. Sci., Oklahoma Univ., Norman, OK, USA
ABSTRACT
Real-time digital signal processing for critical applications demands that rapid successful reconfiguration techniques be employed to increase fault tolerance. To meet this need, we introduce and demonstrate a local area reconfiguration algorithm for a rectangular processor array that is very efficient, does not require a host processor, and will successfully reconfigure for a fault anywhere in the local area if there is an available spare. Further, if all the spares in a local area are used, areas can be combined in a software controlled process, preventing a system failure.<>
INDEX TERMS
real-time systems, fault tolerant computing, reliability, reconfigurable architectures, distributed algorithms, computational complexity
CITATION

M. Derk and L. DeBrunner, "Dynamic reconfiguration for fault tolerance for critical, real-time processor arrays," Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers(ACSSC), Pacific Grove, CA, USA, 1995, pp. 1058-1062.
doi:10.1109/ACSSC.1994.471621
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