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Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers (1994)
Pacific Grove, CA, USA
Oct. 31, 1994 to Nov. 2, 1994
ISSN: 1058-6393
ISBN: 0-8186-6405-3
pp: 1026-1030
B. Allam , Dept. of Electr. & Comput. Eng., Old Dominion Univ., Norfolk, VA, USA
M. Meyer , Dept. of Electr. & Comput. Eng., Old Dominion Univ., Norfolk, VA, USA
J. Leathrum , Dept. of Electr. & Comput. Eng., Old Dominion Univ., Norfolk, VA, USA
ABSTRACT
A fault tolerant pipelined architecture for high sampling rate adaptive filters is presented. The architecture, which is based on the computational requirements of delayed LMS and adaptive lattice filters, offers robust performance in the presence of single hardware faults, and software faults resulting from numerical instability. The reliability of the proposed system is analyzed and compared to the existing implementations strategies, and methods for fault detection, fault location, and recovery via hardware reconfiguration are discussed. Finally, simulation results illustrating recovery from processor fault are presented.<>
INDEX TERMS
fault tolerant computing, pipeline processing, adaptive filters, lattice filters, least mean squares methods, signal sampling, numerical stability, circuit reliability
CITATION

B. Allam, M. Meyer and J. Leathrum, "A fault tolerant pipelined adaptive filter," Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers(ACSSC), Pacific Grove, CA, USA, 1995, pp. 1026-1030.
doi:10.1109/ACSSC.1994.471615
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