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Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers (1994)
Pacific Grove, CA, USA
Oct. 31, 1994 to Nov. 2, 1994
ISSN: 1058-6393
ISBN: 0-8186-6405-3
pp: 273-277
J.A. McIntosh , Nat. Instrum. Corp., Austin, TX, USA
E.E. Swartzlander , Nat. Instrum. Corp., Austin, TX, USA
ABSTRACT
An 8-bit high-speed cosine generator circuit was designed and simulated. Speed and area estimates were made for 16-, 24-, 32-, 40-, 48-, 56-, and 64-bit designs. The basis of the cosine generator design is stages of a half-angle cosine function preceded by a low order Taylor series approximation of cos (/spl theta//2/sup N/). This turns out to be a decent approximation. The big difference between this and most other methods is that a lookup ROM for the first order approximations is avoided.<>
INDEX TERMS
signal processing, digital arithmetic, Chebyshev approximation, approximation theory, polynomials, series (mathematics)
CITATION

J. McIntosh and E. Swartzlander, "High-speed cosine generator," Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers(ACSSC), Pacific Grove, CA, USA, 1995, pp. 273-277.
doi:10.1109/ACSSC.1994.471459
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