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2013 Third International Conference on Advanced Computing & Communication Technologies (ACCT 2013) (2013)
April 6, 2013 to April 7, 2013
ISSN: 2327-0632
ISBN: 978-1-4673-5965-8
pp: 121-125
Proper placement of FACTS devices is very important for the rapid and successful operation because of high cost and circuit complexities. In this paper best location of UPFC (Unified Power Flow Controller) is obtained both for static and transient voltage stability enhancement of an IEEE 14 bus power system. The simulation is done on PSAT (Power System Analysis Tool-box) in MATLAB and optimal location is found out by Continuation Power Flow (CPF) and Line stability index. The bus having lowest voltage is the critical bus and the line having largest value of index for maximum permissible load with respect to a bus is the most critical line referred to that bus. It is found that by properly placing UPFC load ability margin of the system has been increased considerably leading to improvement of voltage stability and stability index value decreases at each reactive load with the insertion of the device at right place. Transient stability analysis is also done for an IEEE 14 bus system with a fault created at a bus. It is found from the time domain simulation that proper placement of UPFC increases the transient performance of the system by damping out the power oscillation under large disturbance conditions.
power control, power engineering computing, power system stability

A. Gupta and P. Sharma, "Static and Transient Stability Enhancement of Power System by Optimally Placing UPFC (Unified Power Flow Controller)," 2013 Third International Conference on Advanced Computing & Communication Technologies (ACCT 2013)(ACCT), Rohtak, 2013, pp. 121-125.
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