Issue No. 01 - January-March (2008 vol. 7)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MPRV.2008.3
Ji-Jon Sit , Advanced Bionics
Rahul Sarpeshkar , Massachusetts Institute of Technology
This 75 dB, 357 mW analog cochlear-implant processor encodes fine-phase-timing spectral information in its asynchronous stimulation outputs, to convey music to deaf patients. This processor features asynchronous interleaved sampling (AIS) and uses a race-to-spike winner-take-all strategy. This strategy ensures that sampling for electrode stimulation occurs on only one channel at a time, thus preventing electrode-smearing interactions. Phase-encoded, high-rate sampling of high-intensity channels, along with lower-rate sampling of low-intensity channels, is typically achievable. This keeps stimulation power low and enables more natural, asynchronous stochastic stimulation of the auditory nerve. Reconstructions of music encoded from this processor’s sampled outputs reveal significantly better fidelity compared with traditional processing schemes, which convey only amplitude information. This processor’s power consumption is more than an order of magnitude lower than traditional A/D-then-DSP cochlear-implant processors. Programmability is achievable because 546 bits can alter 165 spectral and AIS parameters via a serial interface. This article is part of a special issue on implantable electronics.
cochlear implant, fine-timing information, asynchronous, electrode stimulation, analog processor, phase information, music processor, neural stimulation, low power
Ji-Jon Sit, Rahul Sarpeshkar, "A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power", IEEE Pervasive Computing, vol. 7, no. , pp. 40-48, January-March 2008, doi:10.1109/MPRV.2008.3