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Issue No.02 - March/April (2012 vol.32)
pp: 20-27
Efraim Rotem , Intel
Alon Naveh , Intel
Doron Rajwan , Intel, Haifa
<p>Modern microprocessors are evolving into system-on-a-chip designs with high integration levels, catering to ever-shrinking form factors. Portability without compromising performance is a driving market need. An architectural approach that's adaptive to and cognizant of workload behavior and platform physical constraints is indispensable to meeting these performance and efficiency goals. This article describes power-management innovations introduced on Intel's Sandy Bridge microprocessor.</p>
power management, energy management, Turbo Boost, Sandy Bridge
Efraim Rotem, Alon Naveh, Avinash Ananthakrishnan, Doron Rajwan, Eliezer Weissmann, "Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge", IEEE Micro, vol.32, no. 2, pp. 20-27, March/April 2012, doi:10.1109/MM.2012.12
1. Second Generation Intel Core Processor Family Mobile External Design Specification (EDS), v. 1-2, 2011.
2. S. Gochman et al., "Introduction to Intel Core Duo Processor Architecture," Intel Technology J., vol. 10, no. 2, 2006, pp. 89-97.
3. S. Gunther et al., "Energy-Efficient Computing: Power Management System on the Nehalem Family of Processors," Intel Technology J., vol. 14, no. 3, 2010.
4. Intel 64 IA-32 Architectures Software Developer's Manual Documentation Changes, 2011; 64-ia-32-architectures-software-developers-manual.html .
5. Intel 64 and IA-32 Architectures Optimization Reference Manual, 2011; 64-ia-32-architectures-optimization-manual.html .
6. Advanced Configuration and Power Interface (ACPI) Specification, rev. 5.0, Dec. 2011; http://www.acpi.infospec50.htm.
7. Bapco, SYSMark 2007;
8. M. Berktold and T. Tian, "CPU Monitoring with DTS/PECI," white paper, Intel, Sept. 2010.
9. Intersil, Power Management Products—Processor Power, 2012; http://www.intersil.comprocessor_power.
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