Issue No. 06 - Nov.-Dec. (2011 vol. 31)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2011.106
Erik R. Altman , firstname.lastname@example.org
With this issue, I have the honor of welcoming five new members to the IEEE Micro Editorial Board: Lieven Eeckhout, R. Govindarajan, Toshio Nakatani, André Seznec, and Olivier Temam. As the accompanying sidebar indicates, each of these distinguished leaders in our community brings new perspectives and experience, and will help make IEEE Micro an even better and more compelling magazine. I am delighted and thankful that they accepted my invitation to join the Board.
This issue focuses on cool chips, and I thank Guest Editors Makoto Ikeda and Fumio Arakawa for their fine job. The types of chips and domains include networking, imaging, software radio, and reconfigurable arrays of processing elements. The microarchitectural heterogeneity in this issue continues a theme from both our last issue on CPUs vs. GPUs and our July/August issue on Big Chips, whose size helps enable heterogeneity. This increased heterogeneity is visible in legacy computing platforms and even more so in new (and "cool") computing platforms, like cell phones and tablets, which will probably accelerate the heterogeneous trend as they become more of a driving force in "general purpose" design.
This heterogeneity in turn raises larger questions, a number of which are explored in this issue. For example, where should activities such as software-defined radio be done, and who decides—the microarchitecture, a hypervisor, or a high-level piece of management software? Is it more efficient and quicker to compute on a mobile device or on a server in a cloud to which the mobile device has access? Amazon's recently introduced Kindle Fire explicitly raises these questions.
For microarchitects, these issues could imply increased collaboration with others, as traditional microarchitectural issues such as power management expand to include new nonmicroarchitectural options. These options in turn raise questions such as how information should be exchanged between all the components participating in power management. For example, if multiple activities need to be performed simultaneously, which activities are best done locally, and which are best offloaded? Making such a decision well probably requires both microarchitectural and software activity and exchange of information between the two.
Of course, such decisions are not limited to remote offload. Is a computation better performed in a CPU or a GPU or a DSP? Currently, such decisions are made statically as designs are partitioned. However, fat binaries could emerge, which allow a function to execute on multiple computing engines within a single platform, leaving it to some form of platform microarchitecture to determine the best option.
This heterogeneity raises other issues. Until recently, mainstream computing platforms have generally run at frequencies within a small multiple of each other, such as 1 to 5 GHz. However, such narrow ranges have not always been the case. When the IBM PC debuted 30 years ago, it ran at 4.77 MHz versus 80 MHz for a Cray-1A, a difference of more than 16×. Heterogeneous designs might be pushing us back to such an era, which would have implications not only on microarchitecture, but on software and the performance portability of software from one platform to another.
Other areas will also be impacted. The last several years have seen great focus on virtualization, especially in support of cloud computing. However, heterogeneity makes virtualization significantly more challenging and could provide a counterweight to the virtualization trend. Heterogeneity is also making for interesting tensions and interactions between shared memory and cache consistency on the one hand and on-chip networks on the other.
All in all, the impact and variety of microarchitecture has never been so great, nor has the long-term outcome been so unclear. We live in interesting times.
Erik R. Altman
Editor in Chief