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Issue No.02 - March/April (2011 vol.31)
pp: 76-85
<p>The IBM Power Edge of Network processor combines the attributes of a general-purpose processing subsystem with function accelerators and networking interfaces to create a system on a chip that's targeted for applications at the edge of network. This article discusses in detail the processing, accelerator, and network interface subsystems and explores applications well suited to the PowerEN processor.</p>
Multicore multiprocessors, single-chip multiprocessors, on-chip interconnection networks, parallel architectures, processor architectures, network-level security and protection, data encryption, support for multithreaded execution, microarchitecture implementation considerations
Jeffrey D. Brown, Sandra Woodward, Brian M. Bass, Charles L. Johnson, "IBM Power Edge of Network Processor: A Wire-Speed System on a Chip", IEEE Micro, vol.31, no. 2, pp. 76-85, March/April 2011, doi:10.1109/MM.2011.3
1. D.P. LaPotin et al., "Workload and Network-Optimized Computing Systems," IBM J. Research and Development, vol. 54, no. 1, 2010, pp. 1:1-1:12.
2. H.O. Le et al., "IBM Power6 Microarchitecture," IBM J. Research and Development, vol. 51, no. 6, 2007, pp. 669-662.
3. D.M. Tullsen, S.J. Eggers, and H.M. Levy, "Simultaneous Multithreading: Maximizing On-Chip Parallelism," Proc. 22nd Ann. Int'l Symp. Computer Architecture, IEEE Press, 1995, pp. 392-403.
4. J. van Lunteren, "High-Performance Pattern-Matching for Intrusion Detection," Proc. 25th IEEE Int'l Conf. Computer Comm., IEEE Press, 2006, doi:10.1109/INFOCOM.2006.204.
5. R. Salz, H. Achilles, and D. Maze, "Hardware and Software Trade-offs in the IBM DataPower XML XG4 Processor Card," Proc. Int'l Symp. Processing XML Efficiently: Overcoming Limits on Space, Time, or Bandwidth, Balisage, 2009, vol. 4, doi:10.4242/BalisageVol4.Salz01.
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