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Issue No. 01 - January/February (2011 vol. 31)
ISSN: 0272-1732
pp: 20-28
Vijay Janapa Reddi , Harvard University
Svilen Kanev , Harvard University
Wonyoung Kim , Harvard University
Simone Campanoni , Harvard University
Michael D. Smith , Harvard University
Gu-Yeon Wei , Harvard University
David Brooks , Harvard University
<p>Voltage variations are a major challenge in processor design. Here, researchers characterize the voltage noise characteristics of programs as they run to completion on a production Core 2 Duo processor. Furthermore, they characterize the implications of resilient architecture design for voltage variation in future systems.</p>
Software thread scheduling, processor design, dI/dt, voltage margins, inductive noise
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks, "Voltage Noise in Production Processors", IEEE Micro, vol. 31, no. , pp. 20-28, January/February 2011, doi:10.1109/MM.2010.104
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