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Issue No.06 - November/December (2010 vol.30)
pp: 46-56
Frederick Ryckbosch , Ghent University, Gent
Stijn Polfliet , Ghent University, Gent
Lieven Eeckhout , Ghent University, Gent
<p>This article presents a fast and accurate interval-based CPU timing model that is easily implemented and integrated in the COTSon full-system simulation infrastructure. Validation against real x86 hardware demonstrates the timing model's accuracy. The end result is a software simulator that faithfully simulates x86 hardware at a speed in the tens of MIPS range.</p>
architectural simulation, modeling, validation
Frederick Ryckbosch, Stijn Polfliet, Lieven Eeckhout, "Fast, Accurate, and Validated Full-System Software Simulation of x86 Hardware", IEEE Micro, vol.30, no. 6, pp. 46-56, November/December 2010, doi:10.1109/MM.2010.95
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