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Issue No. 06 - November/December (2010 vol. 30)
ISSN: 0272-1732
pp: 25-35
Christopher Hughes , Intel, Santa Clara
Changkyu Kim , Intel, Santa Clara
Yen-Kuang Chen , Intel Corporation , Santa Clara
<p>Processors that target throughput computing often have many cores, which stresses the cache hierarchy. Logically centralized, shared data storage is needed for many-core chips to provide high cache throughput for heavily read-write shared lines. Techniques to reduce on-die and off-die traffic have a dramatic energy benefit for many-core chips.</p>
multicore/single-chip multiprocessors, memory hierarchy, graphics processors, throughput computing
Christopher Hughes, Changkyu Kim, Yen-Kuang Chen, "Performance and Energy Implications of Many-Core Caches for Throughput Computing", IEEE Micro, vol. 30, no. , pp. 25-35, November/December 2010, doi:10.1109/MM.2010.83
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