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Issue No. 02 - March/April (2010 vol. 30)
ISSN: 0272-1732
pp: 70-79
Tony M. Brewer , Convey Computer
<p>The Convey HC-1 is a heterogeneous computing system based on an industry-standard Intel processor and a proprietary coprocessor that share virtual memory and an instruction stream, creating a hybrid-core computing system. The coprocessor architecture supports user-defined, dynamically loadable instruction sets. Managing the decoding, dispatch, and execution of completely user-defined instructions requires an innovative approach to system design and operation.</p>
heterogeneous computing, hybrid-core computing, instruction set design, FPGAs, reconfigurable computing, coprocessors, accelerators

T. M. Brewer, "Instruction Set Innovations for the Convey HC-1 Computer," in IEEE Micro, vol. 30, no. , pp. 70-79, 2010.
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