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Issue No. 01 - January/February (2010 vol. 30)
ISSN: 0272-1732
pp: 92-100
Frederic T. Chong , University of California, Santa Barbara
Xun Li , University of California, Santa Barbara
Mohit Tiwari , University of California, Santa Barbara
Shashidhar Mysore , University of California, Santa Barbara
Timothy Sherwood , University of California, Santa Barbara
Bita Mazloom , University of California, Santa Barbara
Hassan M.G. Wassel , University of California, Santa Barbara
ABSTRACT
<p>This article describes a new method for constructing and analyzing architectures that can track all information flows within a processor, including explicit, implicit, and timing flows. The key to this approach is a novel gate-level information-flow-tracking method that provides a way to create complex logical structures with well-defined information-flow properties.</p>
INDEX TERMS
high-assurance systems, information-flow tracking, noninterference, timing channels, covert channels
CITATION
Frederic T. Chong, Xun Li, Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood, Bita Mazloom, Hassan M.G. Wassel, "Gate-Level Information-Flow Tracking for Secure Architectures", IEEE Micro, vol. 30, no. , pp. 92-100, January/February 2010, doi:10.1109/MM.2010.17
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