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TABLE OF CONTENTS
Issue No. 06 - November/December (vol. 29)
ISSN: 0272-1732
Micro Economics

A Network of Platforms (Abstract)

Shane Greenstein , greenstein@kellogg.northwestern.edu
pp. 2-3
Erratum

Erratum (HTML)

pp. 4
Cool Chips

Guest Editors' Introduction: Cool Chips (HTML)

Makoto Ikeda , University of Tokyo
Fumio Arakawa , Renesas Technology
pp. 5-6

Domain Partitioning Technology for Embedded Multicore Processors (Abstract)

Naohiko Irie , Hitachi
Yuki Kondo , Hitachi
Tohru Nojiri , Hitachi
Masayuki Ito , Renesas Technology
Hajime Sasaki , Renesas Technology
Hideo Maejima , Tokyo Institute of Technology
pp. 7-17

A Full HD Multistandard Video Codec for Mobile Applications (Abstract)

Hiroshi Ueda , Renesas Technology
Masakazu Ehama , Renesas Technology
Seiji Mochizuki , Renesas Technology
Motoki Kimura , Renesas Technology
Kenichi Iwata , Renesas Technology
Hiromi Watanabe , Renesas Technology
pp. 18-27

Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-Aware Task Pipelining (Abstract)

Jinwook Oh , Korea Advanced Institute of Science and Technology
Hoi-Jun Yoo , Korea Advanced Institute of Science and Technology
Joo-Young Kim , Korea Advanced Institute of Science and Technology
Seungjin Lee , Korea Advanced Institute of Science and Technology
Sejong Oh , Korea Advanced Institute of Science and Technology
Minsu Kim , Korea Advanced Institute of Science and Technology
pp. 28-43

Architecture Design of Versatile Recognition Processor for Sensornet Applications (Abstract)

Tadahiro Kuroda , Keio University
Yuichi Hori , Keio University
Jun Nishimura , Keio University
Yuya Hanai , Keio University
pp. 44-57

A QVGA-Size Pixel-Parallel Image Processor for 1,000-fps Vision (Abstract)

Takashi Komuro , University of Tokyo
Masatoshi Ishikawa , University of Tokyo
Atsushi Iwashita , University of Tokyo
pp. 58-67
Prolegomena
Micro Law
Annual Index

Annual Index (PDF)

pp. 1
89 ms
(Ver )