The Community for Technology Leaders
Green Image
Issue No. 03 - May/June (2009 vol. 29)
ISSN: 0272-1732
pp: 10-19
Thomas B. Berg , MIPS Technologies
<p>In embedded systems, multiple cores mean multiple caches and often multiple cache levels. Consequently, maintaining coherency between the cores' caches and the data generated or consumed by I/O devices is challenging, with different solutions trading off hardware versus software complexity. The optimal approach for I/O data coherence depends on application and system characteristics, and might require a combination of techniques.</p>
multicore, I/O coherence, hardware/software interfaces, memory hierarchy, embedded systems, coherence manager, cache
Thomas B. Berg, "Maintaining I/O Data Coherence in Embedded Multicore Systems", IEEE Micro, vol. 29, no. , pp. 10-19, May/June 2009, doi:10.1109/MM.2009.44
86 ms
(Ver 3.3 (11022016))