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Issue No. 01 - January/February (2009 vol. 29)
ISSN: 0272-1732
pp: 96-103
Shih-Lien Lu , Intel
ABSTRACT
<p>Two proposed techniques let microprocessors operate at low voltages despite high memory-cell failure rates. They identify and disable defective portions of the cache at two granularities: individual words or pairs of bits. Both techniques use the entire cache during high-voltage operation while sacrificing cache capacity during low-voltage operation to reduce the minimum voltage below 500 mV.</p>
INDEX TERMS
cache, low-voltage
CITATION

S. Lu, C. Wilkerson, M. Khellah, Z. Chishti, A. R. Alameldeen and H. Gao, "Trading Off Cache Capacity for Low-Voltage Operation," in IEEE Micro, vol. 29, no. , pp. 96-103, 2009.
doi:10.1109/MM.2009.20
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