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Issue No. 01 - January/February (2008 vol. 28)
ISSN: 0272-1732
pp: 32-41
Kevin E. Moore , Sun Microsystems
Mark D. Hill , University of Wisconsin—Madison
Haris Volos , University of Wisconsin—Madison
David A. Wood , University of Wisconsin—Madison
Michael M. Swift , University of Wisconsin—Madison
Jayaram Bobba , University of Wisconsin—Madison
Luke Yen , University of Wisconsin—Madison
ABSTRACT
Transactional memory is a promising approach to ease parallel programming. Hardware transactional memory system designs reflect choices along three key design dimensions: conflict detection, version management, and conflict resolution. The authors identify a set of performance pathologies that could degrade performance in proposed HTM designs. Improving conflict resolution could eliminate these pathologies so designers can build robust HTM systems.
INDEX TERMS
transactional memory, pathology, hardware transactional memory, conflict resolution, version management, conflict detection
CITATION
Kevin E. Moore, Mark D. Hill, Haris Volos, David A. Wood, Michael M. Swift, Jayaram Bobba, Luke Yen, "Performance Pathologies in Hardware Transactional Memory", IEEE Micro, vol. 28, no. , pp. 32-41, January/February 2008, doi:10.1109/MM.2008.11
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