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Issue No. 05 - September/October (2007 vol. 27)
ISSN: 0272-1732
pp: 6-14
Thomas William Ainsworth , Northrop Grumman Space Technology
Timothy Mark Pinkston , University of Southern California
ABSTRACT
On-chip network design has become an increasingly important component of computer architecture. The Cell Broadband Engine's Element Interconnect Bus, with its four data rings and common command bus for end-to-end transaction control, interconnects more nodes than most commercial on-chip networks. To help understand on-chip network design and performance issues in the context of a commercial multicore chip, this article evaluates the EIB network using conventional latency and throughput characterization methods.
INDEX TERMS
interconnection architectures, multiple data stream architectures, multicore architectures, multiprocessors, on-chip interconnection networks
CITATION

T. M. Pinkston and T. W. Ainsworth, "Characterizing the Cell EIB On-Chip Network," in IEEE Micro, vol. 27, no. , pp. 6-14, 2007.
doi:10.1109/MM.2007.81
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