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Issue No. 05 - September/October (vol. 27)
ISSN: 0272-1732

A 5-GHz Mesh Interconnect for a Teraflops Processor (Abstract)

Y. Hoskote , Intel Corp., Hillsboro
S. Vangal , Intel Corp., Hillsboro
A. Singh , Intel Corp., Hillsboro
N. Borkar , Intel Corp., Hillsboro
S. Borkar , Intel Corp., Hillsboro
pp. 51-61

Characterizing the Cell EIB On-Chip Network (Abstract)

Thomas William Ainsworth , Northrop Grumman Space Technology
Timothy Mark Pinkston , University of Southern California
pp. 6-14

On-Chip Interconnection Networks of the TRIPS Chip (Abstract)

Paul Gratz , The University of Texas at Austin
Changkyu Kim , Intel
Karthikeyan Sankaralingam , University of Wisconsin-Madison
Premkishore Shivakumar , The University of Texas at Austin
Stephen W. Keckler , The University of Texas at Austin
Doug Burger , The University of Texas at Austin
pp. 41-50

Bringing NoCs to 65 nm (Abstract)

Antonio Pullini , Politecnico di Torino
Federico Angiolini , Università di Bologna
Srinivasan Murali , École Polytechnique Fédérale de Lausanne
David Atienza , Universidad Complutense de Madrid
Giovanni De Micheli , École Polytechnique Fédérale de Lausanne
Luca Benini , Università di Bologna
pp. 75-85

Challenges and Promising Results in NoC Prototyping Using FPGAs (Abstract)

Umit Y. Ogras , Carnegie Mellon University
Radu Marculescu , Carnegie Mellon University
Hyung Gyu Lee , Samsung Electronics
Puru Choudhary , Carnegie Mellon University
Diana Marculescu , Carnegie Mellon University
Michael Kaufman , Carnegie Mellon University
Peter Nelson , Carnegie Mellon University
pp. 86-95

Research Challenges for On-Chip Interconnection Networks (Abstract)

John D. Owens , University of California, Davis
William J. Dally , Stanford University
Ron Ho , Sun Microsystems
D.N. (Jay) Jayasimha , Intel Corporation
Stephen W. Keckler , University of Texas at Austin
Li-Shiuan Peh , Princeton University
pp. 96-108
Micro Law
Micro Economics

Dog Days for Broadband (Abstract)

Shane Greenstein , Kellogg Graduate School of Management
pp. 112, 111
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