Issue No. 01 - January/February (2007 vol. 27)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2007.17
Milo M.K. Martin , University of Pennsylvania
Amir Roth , University of Pennsylvania
Tingting Sha , University of Pennsylvania
The NoSQ microarchitecture performs store-load communication without a store queue and without executing stores in the out-of-order engine. It uses speculative memory bypassing for all in-flight store-load communication, enabled by a 99.8 percent accurate store-load communication predictor. The result is a simple, fast, core data path containing no dedicated store-load forwarding structures.
pipeline processors, RISC, CISC, VLIW architectures, microarchitecture
Milo M.K. Martin, Amir Roth, Tingting Sha, "NoSQ: Store-Load Communication without a Store Queue", IEEE Micro, vol. 27, no. , pp. 106-113, January/February 2007, doi:10.1109/MM.2007.17