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Issue No. 01 - January/February (2007 vol. 27)
ISSN: 0272-1732
pp: 67-76
Austen McDonald , Stanford University
Brian D. Carlstrom , Stanford University
JaeWoong Chung , Stanford University
Chi Cao Minh , Stanford University
Hassan Chafi , Stanford University
Christos Kozyrakis , Stanford University
Kunle Olukotun , Stanford University
This comprehensive architecture supports nested transactions, transaction handling, and two-phase commit. The result is a seamless integration of transactional memory with modern programming languages and runtime environments.
hardware/software interfaces, parallel architectures, transactional memory

C. C. Minh et al., "Transactional Memory: The Hardware-Software Interface," in IEEE Micro, vol. 27, no. , pp. 67-76, 2007.
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