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Issue No. 03 - May/June (2006 vol. 26)
ISSN: 0272-1732
pp: 41-57
Trammell Hudson , OS Research
Ron Brightwell , Sandia National Laboratories
Kevin T. Pedretti , Sandia National Laboratories
Keith D. Underwood , Sandia National Laboratories
ABSTRACT
The SeaStar, a new ASIC from Cray, is a full system-on-chip design that integrates high-speed serial links, a 3D router, and traditional network interface functionality, including an embedded processor in a single chip.
INDEX TERMS
Cray SeaStar, inteconnect, system-on-chip
CITATION
Trammell Hudson, Ron Brightwell, Kevin T. Pedretti, Keith D. Underwood, "SeaStar Interconnect: Balanced Bandwidth for Scalable Performance", IEEE Micro, vol. 26, no. , pp. 41-57, May/June 2006, doi:10.1109/MM.2006.65
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