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TABLE OF CONTENTS
Issue No. 01 - January/February (vol. 26)
ISSN: 0272-1732
Editor-in-Chief's Message
Micro Economics

Format wars all over again (Abstract)

Shane Greenstein , Northwestern University
pp. 7, 140
Features

Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance (Abstract)

Onur Mutlu , University of Texas at Austin
Hyesoon Kim , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
pp. 10-20

Adaptive History-Based Memory Schedulers for Modern Processors (Abstract)

Ibrahim Hur , IBM Corp. and The University of Texas at Austin
Calvin Lin , The University of Texas at Austin
pp. 22-29

Scalable Load and Store Processing in Latency-Tolerant Processors (Abstract)

Amit Gandhi , Intel Corp.
Haitham Akkary , Intel Corp.
Ravi Rajwar , Intel Corp.
Konrad Lai , Intel Corp.
pp. 30-39

Tolerating Cache-Miss Latency with Multipass Pipelines (Abstract)

Ronald D. Barnes , George Mason University
Shane Ryoo , University of Illinois, Urbana-Champaign
Wen-mei W. Hwu , University of Illinois, Urbana-Champaign
pp. 40-47

Wish Branches: Enabling Adaptive and Aggressive Predicated Execution (Abstract)

Hyesoon Kim , University of Texas at Austin
Onur Mutlu , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
Jared Stark , Intel
pp. 48-58

Unbounded Transactional Memory (Abstract)

C. Scott Ananian , Massachusetts Institute of Technology
Krste Asanovic , Massachusetts Institute of Technology
Bradley C. Kuszmaul , Massachusetts Institute of Technology
Charles E. Leiserson , Massachusetts Institute of Technology
Sean Lie , Advanced Micro Devices
pp. 59-69

Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays (Abstract)

Jason F. Cantin , University of Wisconsin-Madison
James E. Smith , University of Wisconsin-Madison
Mikko H. Lipasti , University of Wisconsin-Madison
Andreas Moshovos , University of Toronto
Babak Falsafi , Carnegie Mellon University
pp. 70-79

Energy-Efficient Thread-Level Speculation (Abstract)

Jose Renau , University of California at Santa Cruz
Karin Strauss , University of Illinois at Urbana-Champaign
Luis Ceze , University of Illinois at Urbana-Champaign
Wei Liu , University of Illinois at Urbana-Champaign
Smruti R. Sarangi , University of Illinois at Urbana-Champaign
James Tuck , University of Illinois at Urbana-Champaign
Josep Torrellas , University of Illinois at Urbana-Champaign
pp. 80-91

Opportunistic Transient-Fault Detection (Abstract)

Mohamed A. Gomaa , Purdue University
T. N. Vijaykumar , Purdue University
pp. 92-99

BugNet: Recording Application-Level Execution for Deterministic Replay Debugging (Abstract)

Satish Narayanasamy , University of California, San Diego
Gilles Pokam , University of California, San Diego
Brad Calder , University of California, San Diego
pp. 100-109

Architectures for Bit-Split String Scanning in Intrusion Detection (Abstract)

Lin Tan , University of Illinois, Urbana-Champaign
Timothy Sherwood , University of California, Santa Barbara
pp. 110-117

Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance (Abstract)

Qiang Wu , Princeton University
Margaret Martonosi , Princeton University
Douglas W. Clark , Princeton University
Vijay Janapa Reddi , University of Colorado at Boulder
Dan Connors , University of Colorado at Boulder
Youfeng Wu , Intel
Jin Lee , Intel
David Brooks , Harvard University
pp. 119-129

Temperature-Aware On-Chip Networks (Abstract)

Li Shang , Queen's University
Li-Shiuan Peh , Princeton University
Amit Kumar , Princeton University
Niraj K. Jha , Princeton University
pp. 130-139
Micro Review

The future will soon be here (HTML)

Richard Mateosian , EMC/Documentum
pp. 141-142
Micro Innovations

How to write a patent (Abstract)

Phil Emma , IBM Corp.
pp. 144
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