Issue No. 04 - July/August (2005 vol. 25)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2005.70
Zhichun Zhu , University of Illinois at Chicago
Xiaodong Zhang , College of William and Mary
An effective approach to reducing processor power consumption is to adaptively activate and deactivate hardware resources. The authors propose a look-ahead scheme that adjusts the processor issue rate triggered by main-memory accesses. This architecture-independent technique is particularly effective for memory-intensive applications. Combined with an existing technique based on IPC values, it also reduces power consumption for computation-intensive applications.
Low-power design, Processor Architectures
Z. Zhu and X. Zhang, "Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption," in IEEE Micro, vol. 25, no. , pp. 10-19, 2005.