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Issue No. 02 - March/April (2005 vol. 25)
ISSN: 0272-1732
pp: 21-29
Poonacha Kongetira , Sun Microsystems
Kathirgamar Aingaran , Sun Microsystems
Kunle Olukotun , Sun Microsystems
ABSTRACT
The Niagara processor implements a thread-rich architecture designed to provide a high-performance solution for commercial server applications. The hardware supports 32 threads with a memory subsystem consisting of an on-board crossbar, level-2 cache, and memory controllers for a highly integrated design that exploits the thread-level parallelism inherent to server applications, while targeting low levels of power consumption.
INDEX TERMS
Microprocessors and microcomputers, Shared memory, Multithreaded processors
CITATION

K. Olukotun, P. Kongetira and K. Aingaran, "Niagara: A 32-Way Multithreaded Sparc Processor," in IEEE Micro, vol. 25, no. , pp. 21-29, 2005.
doi:10.1109/MM.2005.35
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