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Issue No. 02 - March/April (2005 vol. 25)
ISSN: 0272-1732
pp: 5
As we introduce this year?s Hot Chips theme issue, the frequency slowdown trend that is upon us as a result of the CMOS technology outlook has to be the single major point that stands out. It is not just the per-chip power dissipation envelope that is forcing this trend, although that factor alone is perhaps the major deterrent to frequency escalation at prior (historical) rates.

P. Bose, "Variation-tolerant design," in IEEE Micro, vol. 25, no. , pp. 5, 2005.
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