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Issue No. 01 - January/February (2005 vol. 25)
ISSN: 0272-1732
pp: 30-40
Patrick H. Worley , Oak Ridge National Laboratory
Thomas H. Dunigan Jr. , Oak Ridge National Laboratory
Jeffrey S. Vetter , Oak Ridge National Laboratory
James B. White III , Oak Ridge National Laboratory
ABSTRACT
The Cray X1 supercomputer's distributed shared memory presents a 64-bit global address space that is directly addressable from every MSP with an interconnect bandwidth per computation rate of 1 byte/flop. Our results show that this high bandwidth and low latency for remote memory accesses translate into improved application performance on important applications.
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CITATION
Patrick H. Worley, Thomas H. Dunigan Jr., Jeffrey S. Vetter, James B. White III, "Performance Evaluation of the Cray X1 Distributed Shared-Memory Architecture", IEEE Micro, vol. 25, no. , pp. 30-40, January/February 2005, doi:10.1109/MM.2005.20
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