Issue No. 06 - November/December (2004 vol. 24)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2004.81
Harold W. Cain , IBM Research
Mikko H. Lipasti , University of Wisconsin
Value-based replay eliminates the need for content-addressable memories in the load queue, removing one barrier to scalable outof-order instruction windows. Instead, correct memory ordering is maintained by simply re-executing certain load instructions in program order. A set of novel filtering heuristics reduces the average additional cache bandwidth demanded by value-based replay to less than 3.5 percent.
M. H. Lipasti and H. W. Cain, "Memory Ordering: A Value-Based Approach," in IEEE Micro, vol. 24, no. , pp. 110-117, 2004.