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Issue No. 04 - July/August (2004 vol. 24)
ISSN: 0272-1732
pp: 54-66
Sridhar Rajagopal , WiQuest Communications
Joseph R. Cavallaro , Rice University
Scott Rixner , Rice University
This tool explores tradeoffs between organization and number of ALUs and clock frequency in a stream processor. The tool provides candidate low-power configurations and estimates of their real-time performance. The tool relates instruction-level, subword, and data parallelism to functional units' organization and utilization. The exploration methodology is applicable to all embedded-processor designs in signal and media processing.

S. Rixner, S. Rajagopal and J. R. Cavallaro, "Design Space Exploration for Real-Time Embedded Stream Processors," in IEEE Micro, vol. 24, no. , pp. 54-66, 2004.
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